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74HC181 Datasheet(Hoja de datos) 10 Page - NXP Semiconductors

No. de Pieza. 74HC181
Descripción  4-bit arithmetic logic unit
Descarga  20 Pages
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Fabricante  PHILIPS [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo 

 10 page
background image
1998 Jun 10
10
Philips Semiconductors
Product specification
4-bit arithmetic logic unit
74HC/HCT181
Note to the AC characteristics
1. For the open drain output (A=B) only tTHL is valid.
tPHL/ tPLH
propagation delay
Ai to Fi
74
27
22
230
46
39
290
58
49
345
69
59
ns
2.0
4.5
6.0
logic
M = 4.5 V;
Fig.8;
Table 3
tPHL/ tPLH
propagation delay
Bi to Fi
83
30
24
255
51
43
320
64
54
385
77
65
ns
2.0
4.5
6.0
logic
M = 4.5 V;
Fig.8;
Table 3
tPHL/ tPLH
propagation delay
An to Cn+4
80
29
23
235
47
40
295
59
50
355
71
60
ns
2.0
4.5
6.0
sum
M=S1 =S2 =0V;
S0 =S3 = 4.5 V;
Fig.8; Table 1
tPHL/ tPLH
propagation delay
Bn to Cn+4
80
29
23
235
47
40
295
59
50
355
71
60
ns
2.0
4.5
6.0
sum
M=S1 =S2 =0V;
S0 =S3 = 4.5 V;
Fig.8; Table 1
tPHL/ tPLH
propagation delay
An to Cn+4
77
28
22
235
47
40
295
59
50
355
71
60
ns
2.0
4.5
6.0
diff
M=S0 =S3 =0V;
S1 =S2 = 4.5 V;
Fig.10; Table 2
tPHL/ tPLH
propagation delay
Bn to Cn+4
85
31
25
255
51
43
320
64
54
385
77
65
ns
2.0
4.5
6.0
diff
M=S0 =S3 =0V;
S1 =S2 = 4.5 V;
Fig.10; Table 2
tPZL/ tPLZ
propagation delay
An to A=B
80
29
23
245
49
42
305
61
52
370
74
63
ns
2.0
4.5
6.0
diff
M=S0 =S3 =0V;
S1 =S2 = 4.5 V;
Fig.11; Table 2
tPZL/ tPLZ
propagation delay
Bn to A=B
88
32
26
270
54
46
340
68
58
405
81
69
ns
2.0
4.5
6.0
diff
M=S0 =S3 =0V;
S1 =S2 = 4.5 V;
Fig.11; Table 2
tPHL/ tPLH
propagation delay
An to Fn
83
30
24
255
51
43
320
64
54
385
77
65
ns
2.0
4.5
6.0
sum
M=S1 =S2 =0V;
S0 =S3 = 4.5 V;
Fig.7; Table 1
tPHL/ tPLH
propagation delay
Bn to Fn
85
31
25
265
53
45
330
66
56
400
80
68
ns
2.0
4.5
6.0
sum
M=S1 =S2 =0V;
S0 =S3 = 4.5 V;
Fig.7; Table 1
tPHL/ tPLH
propagation delay
An to Fn
77
28
22
240
48
41
300
60
51
360
72
61
ns
2.0
4.5
6.0
diff
M=S0 =S3 =0V;
S1 =S2 = 4.5 V;
Fig.8; Table 2
tPHL/ tPLH
propagation delay
Bn to Fn
88
32
26
275
55
47
345
69
59
415
83
71
ns
2.0
4.5
6.0
diff
M=S0 =S3 =0V;
S1 =S2 = 4.5 V;
Fig.8; Table 2
tTHL/ tTLH
output transition
time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
note ;
Figs 7 and 11
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC
VCC
(V)
MODE
OTHER
+25
−40 to +85 −40 to +125
min.
typ.
max.
min.
max.
min.
max.




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