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FIN224AC Datasheet(PDF) 7 Page - Fairchild Semiconductor |
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FIN224AC Datasheet(HTML) 7 Page - Fairchild Semiconductor |
7 / 23 page ©2006 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FIN224AC Rev. 1.0.7 Serializer Operation Mode (Continued) When operating in mode 3, the effective serial speed is divided by two. This mode has been implemented to accommodate cases where the reference clock frequency is high compared to the actual strobe frequency. The actual strobe frequency must be less than or equal to 50% of the CKREF frequency for this mode to work properly. This mode, in all other ways, operates the same as described in the section where CKREF does not equal STROBE. Figure 7. CKREF > 2x STROBE Frequency; Mode 3 Operation (S1 = S2 = 1) A third method of serialization can be acheived by providing a free-running bit clock on the CKSI signal. This mode is enabled by grounding the CKREF signal and driving the DIRI signal HIGH. At power-up, the device is configured to accept a serialization clock from CKSI. If a CKREF is received, this device enables the CKREF serialization mode. The device remains in this mode even if CKREF is stopped. To re-enable this mode, the device must be powered down and then powered back up with a “logic 0” on CKREF. Figure 8. Serializer Timing Diagram Using Provided Bit Clock (No CKREF) No Data WORD n-1 WORD n DP[1:24] WORD n-1 WORD n WORD n+1 No Data CKREF DSO b1 b2 b3 b4 b5 b6 b7 b22 b23 b24 b25 b26 b1 b2 b3 CKS0 STROBE WORD n-1 WORD n-1 WORD n No Data No Data DP[1:24] DSO CKS0 CKSI STROBE b1 b2 b3 b1 b2 b3 b4 b5 b6 b7 b22 b23 b24 b25 b26 WORD n+1 WORD n Serializer Operation: (Figure 7), MODE 3 (S1 = S2 = 1), DIRI = 1, CKREF Divide by 2 mode Serializer Operation: (Figure 8), DIRI = 1, No CKREF |
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