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AD8230-EVAL Datasheet(PDF) 11 Page - Analog Devices |
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AD8230-EVAL Datasheet(HTML) 11 Page - Analog Devices |
11 / 16 page AD8230 Rev. 0 | Page 11 of 16 TEMPERATURE ( °C) 150 –50 0 50 100 0 –1 –2 –3 –4 –5 RF = 100kΩ, RG = 1kΩ RF = 10kΩ, RG = 100Ω Figure 30. Effect of Feedback Resistor on Offset Voltage Drift LEVEL-SHIFTING THE OUTPUT A reference voltage, as shown in Figure 31, can be used to level- shift the output 1 V from midsupply. Otherwise, it is nominally tied to midsupply. The voltage source used to level-shift the output should have a low output impedance to avoid contribut- ing to gain error. In addition, it should be able to source and sink current. To minimize offset voltage, the VREF pins should be connected either to the local ground or to a reference voltage source that is connected to the local ground. 2 6 1 7 5 8 4 3 AD8230 VOUT –VS +VS 0.1 µF RG RF VLEVEL-SHIFT = (+VS +–VS) 2 ± 1V 0.1 µF Figure 31. Level-Shifting the Output SOURCE IMPEDANCE AND INPUT SETTLING TIME The input stage of the AD8230 consists of two actively driven, differential switched capacitors, as described in Figure 27 and Figure 28. Differential input signals are sampled on CSAMPLE such that the associated parasitic capacitances, 70 pF, are balanced between the inputs to achieve high common-mode rejection. On each sample period (approximately 85 µs), these parasitic capacitances must be recharged to the common-mode voltage by the signal source impedance (10 kΩ max). INPUT VOLTAGE RANGE The input common-mode range of the AD8230 is rail to rail. However, the differential input voltage range is limited to, approximately, 750 mV. The AD8230 does not phase invert when its inputs are overdriven. INPUT PROTECTION The input voltage is limited to within one diode drop beyond the supply rails by the internal ESD protection diodes. Resistors and low leakage diodes may be used to limit excessive, external voltage and current from damaging the inputs, as shown in Figure 32. Figure 34 shows an overvoltage protection circuit between the thermocouple and the AD8230. 2 6 1 7 5 8 4 3 AD8230 VOUT –VS +VS 0.1 µF 200 Ω 19.1k Ω BAV199 –VS +VS 2.49k Ω 2.49k Ω BAV199 –VS +VS 0.1 µF Figure 32. Overvoltage Input Protection POWER SUPPLY BYPASSING A regulated dc voltage should be used to power the instrumen- tation amplifier. Noise on the supply pins may adversely affect performance. Bypass capacitors should be used to decouple the amplifier. The AD8230 has internal clocked circuitry that requires adequate supply bypassing. A 0.1 µF capacitor should be placed as close to each supply pin as possible. As shown in Figure 29, a 10 µF tantalum capacitor may be used further away from the part. POWER SUPPLY BYPASSING FOR MULTIPLE CHANNEL SYSTEMS The best way to prevent clock interference in multichannel systems is to lay out the PCB with a star node for the positive supply and a star node for the negative supply. Each AD8230 has a pair of traces leading to the star nodes. Using such a tech- nique, crosstalk between clocks is minimized. If laying out star nodes is unfeasible, then use thick traces to minimize parasitic inductance and decouple frequently along the power supply traces. Examples are shown in Figure 33. Care and forethought go a long way in maximizing performance. |
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