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74HC9114 Datasheet(PDF) 2 Page - NXP Semiconductors |
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74HC9114 Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 7 page December 1990 2 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs; inverting 74HC/HCT9114 FEATURES • Schmitt trigger action on all data inputs • Output capability: standard (open drain) • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT9114 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT9114 are nine wide Schmitt trigger inverting buffer with open drain outputs and Schmitt trigger inputs. The Schmitt trigger action in the data inputs transform slowly changing input signals into sharply defined jitter-free output signals. The 74HC/HCT9114 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level. The “9114” is identical to the “9115” but has inverting outputs. QUICK REFERENCE DATA GND = 0 V; Tamb =25 °C; tr =tf = 6 ns Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPHL/ tPLZ propagation delay An to Yn CL = 15 pF; VCC = 5 V 12 13 ns CI input capacitance 3.5 3.5 pF CPD power dissipation capacitance per buffer notes 1 and 2 5 5 pF |
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