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74LVC125A Datasheet(PDF) 2 Page - NXP Semiconductors |
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74LVC125A Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 10 page Philips Semiconductors Product specification 74LVC125A Quad buffer/line driver with 5-volt tolerant inputs/outputs (3-state) 2 1998 Apr 28 853-2010 19310 FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • Direct interface with TTL levels • High impedance when V CC = 0V DESCRIPTION The 74LVC125A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5.0V devices. In 3-state operation, outputs can handle 5V. The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high impedance OFF-state. QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT t /t Propagation delay CL = 50 pF; 30 ns tPHL/tPLH gy nA to nY L VCC = 3.3 V 3.0 ns CI Input capacitance 5.0 pF CPD Power dissipation capacitance per buffer VCC = 3.3 V Notes 1 and 2 25 pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 14-Pin Plastic SO –40 °C to +125°C 74LVC125A D 74LVC125A D SOT108-1 14-Pin Plastic SSOP Type II –40 °C to +125°C 74LVC125A DB 74LVC125A DB SOT337-1 14-Pin Plastic TSSOP Type I –40 °C to +125°C 74LVC125A PW 7LVC125APW DH SOT402-1 |
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