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74LVC162373ADGG Datasheet(PDF) 3 Page - NXP Semiconductors |
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74LVC162373ADGG Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 17 page 2004 Feb 05 3 Philips Semiconductors Product specification 16-bit D-type transparent latch; 30 Ω series termination resistors; 5 V tolerant inputs/outputs; 3-state 74LVC162373A; 74LVCH162373A VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION FUNCTION TABLE Per section of eight bits; note 1 Note 1. H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition; Z = high-impedance OFF-state. TYPE NUMBER TEMPERATURE RANGE PACKAGE PINS PACKAGE MATERIAL CODE 74LVC162373ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1 74LVCH162373ADGG −40 to +125 °C 48 TSSOP48 plastic SOT362-1 74LVC162373ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1 74LVCH162373ADL −40 to +125 °C 48 SSOP48 plastic SOT370-1 OPERATING MODES INPUT INTERNAL LATCH OUTPUT nQn nOE nLE nDn Enable and read register (transparent mode) L H L L L LH H H H Latch and read register L L l L L LLh H H Latch register and disable outputs H L l L Z HL h H Z |
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