Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

SN74V263-6GGM Datasheet(PDF) 1 Page - Texas Instruments

No. de pieza SN74V263-6GGM
Descripción Electrónicos  819218, 1638418, 3276818, 65536 횞 18 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
Download  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

SN74V263-6GGM Datasheet(HTML) 1 Page - Texas Instruments

  SN74V263-6GGM Datasheet HTML 1Page - Texas Instruments SN74V263-6GGM Datasheet HTML 2Page - Texas Instruments SN74V263-6GGM Datasheet HTML 3Page - Texas Instruments SN74V263-6GGM Datasheet HTML 4Page - Texas Instruments SN74V263-6GGM Datasheet HTML 5Page - Texas Instruments SN74V263-6GGM Datasheet HTML 6Page - Texas Instruments SN74V263-6GGM Datasheet HTML 7Page - Texas Instruments SN74V263-6GGM Datasheet HTML 8Page - Texas Instruments SN74V263-6GGM Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 52 page
background image
SN74V263, SN74V273, SN74V283, SN74V293
8192
× 18, 16384 × 18, 32768 × 18, 65536 × 18
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS669D – JUNE 2001 – REVISED FEBRUARY 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Choice of Memory Organizations
– SN74V263 – 8192
× 18/16384 × 9
– SN74V273 – 16384
× 18/32768 × 9
– SN74V283 – 32768
× 18/65536 × 9
– SN74V293 – 65536
× 18/131072 × 9
D 166-MHz Operation
D 6-ns Read/Write Cycle Time
D User-Selectable Input and Output Port Bus
Sizing
×9 in to ×9 out
×9 in to ×18 out
×18 in to ×9 out
×18 in to ×18 out
D Big-Endian/Little-Endian User-Selectable
Byte Representation
D 5-V-Tolerant Inputs
D Fixed, Low First-Word Latency
D Zero-Latency Retransmit
D Master Reset Clears Entire FIFO
D Partial Reset Clears Data, but Retains
Programmable Settings
D Empty, Full, and Half-Full Flags Signal FIFO
Status
D Programmable Almost-Empty and
Almost-Full Flags; Each Flag Can Default to
One of Eight Preselected Offsets
D Selectable Synchronous/Asynchronous
Timing Modes for Almost-Empty and
Almost-Full Flags
D Program Programmable Flags by Either
Serial or Parallel Means
D Select Standard Timing (Using EF and FF
Flags) or First-Word Fall-Through (FWFT)
Timing (Using OR and IR Flags)
D Output Enable Puts Data Outputs in
High-Impedance State
D Easily Expandable in Depth and Width
D Independent Read and Write Clocks Permit
Reading and Writing Simultaneously
D High-Performance Submicron CMOS
Technology
D Glueless Interface With ’C6x DSPs
D Available in 80-Pin Thin Quad Flat Pack
(TQFP) and 100-Pin Ball Grid Array (BGA)
Packages
description
The SN74V263, SN74V273, SN74V283, and SN74V293 are exceptionally deep, high-speed, CMOS first-in
first-out (FIFO) memories with clocked read and write controls and a flexible bus-matching
×9/×18 data flow.
There is flexible
×9/×18 bus matching on both read and write ports.
The period required by the retransmit operation is fixed and short.
The first-word data-latency period, from the time the first word is written to an empty FIFO to the time it can be
read, is fixed and short.
These FIFOs are particularly appropriate for network, video, telecommunications, data communications, and
other applications that need to buffer large amounts of data and match buses of unequal sizes.
Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either an 18-bit
or 9-bit width, as determined by the state of external control pins’ input width (IW) and output width (OW) during
the master-reset cycle.
The input port is controlled by write-clock (WCLK) and write-enable (WEN) inputs. Data is written into the FIFO
on every rising edge of WCLK when WEN is asserted. The output port is controlled by read-clock (RCLK) and
read-enable (REN) inputs. Data is read from the FIFO on every rising edge of RCLK when REN is asserted.
An output-enable (OE) input is provided for 3-state control of the outputs.
Copyright
 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.


Número de pieza similar - SN74V263-6GGM

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Texas Instruments
SN74V263-6GGM TI1-SN74V263-6GGM Datasheet
824Kb / 52P
[Old version datasheet]   3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
More results

Descripción similar - SN74V263-6GGM

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Texas Instruments
SN74V3640 TI-SN74V3640 Datasheet
725Kb / 50P
[Old version datasheet]   1024 횞 36, 2048 횞 36, 4096 횞 36, 8192 횞 36, 16384 횞 36, 32768 횞 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SN74ALVC7804 TI-SN74ALVC7804 Datasheet
150Kb / 11P
[Old version datasheet]   512 횞 18 FIRST-IN, FIRST-OUT MEMORY
SN74ALVC7804 TI-SN74ALVC7804_07 Datasheet
241Kb / 13P
[Old version datasheet]   512 횞 18 FIRST-IN, FIRST-OUT MEMORY
SN74ABT7819A TI-SN74ABT7819A Datasheet
321Kb / 21P
[Old version datasheet]   512 횞 18 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN54ABT7819 TI-SN54ABT7819 Datasheet
289Kb / 20P
[Old version datasheet]   512 횞 18 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT7820 TI-SN74ABT7820 Datasheet
196Kb / 15P
[Old version datasheet]   512 횞 18 횞 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT7819 TI-SN74ABT7819 Datasheet
284Kb / 20P
[Old version datasheet]   512 횞 18 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ACT7804 TI-SN74ACT7804 Datasheet
146Kb / 11P
[Old version datasheet]   512 횞 18 STROBED FIRST-IN, FIRST-OUT MEMORY
SN74ACT7806 TI-SN74ACT7806_06 Datasheet
174Kb / 12P
[Old version datasheet]   256 횞 18 STROBED FIRST-IN, FIRST-OUT MEMORY
SN54ABT7820 TI-SN54ABT7820 Datasheet
199Kb / 14P
[Old version datasheet]   512 횞 18 횞 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com