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ADF4002BRUZ-RL7 Datasheet(PDF) 1 Page - Analog Devices |
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ADF4002BRUZ-RL7 Datasheet(HTML) 1 Page - Analog Devices |
1 / 24 page Phase Detector/Frequency Synthesizer ADF4002 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. FEATURES 400 MHz bandwidth 2.7 V to 3.3 V power supply Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems Programmable charge pump currents 3-wire serial interface Analog and digital lock detect Hardware and software power-down mode 200 MHz phase detector APPLICATIONS Clock conditioning Clock generation IF LO generation GENERAL DESCRIPTION The ADF4002 frequency synthesizer is used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the part can be used as a stand alone PFD and charge pump. FUNCTIONAL BLOCK DIAGRAM CLK DATA LE REFIN RFINA RFINB 24-BIT INPUT REGISTER SDOUT AVDD DVDD CE AGND DGND 14-BIT R COUNTER R COUNTER LATCH 22 14 FUNCTION LATCH N COUNTER LATCH 13-BIT N COUNTER M3 M2 M1 MUX SDOUT AVDD HIGH Z MUXOUT CPGND RSET VP CP PHASE FREQUENCY DETECTOR LOCK DETECT REFERENCE CHARGE PUMP CURRENT SETTING 1 ADF4002 CPI3 CPI2 CPI1 CPI6 CPI5 CPI4 CURRENT SETTING 2 Figure 1. |
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