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BF1201WR Datasheet(PDF) 8 Page - NXP Semiconductors |
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BF1201WR Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 16 page 2000 Mar 29 8 Philips Semiconductors Product specification N-channel dual-gate PoLo MOS-FETs BF1201; BF1201R; BF1201WR handbook, halfpage MCD947 10 f (MHz) Yis (mS) 102 103 102 10 1 10−1 bis gis Fig.17 Input admittance as a function of frequency; typical values. VDS = 5 V; VG2 =4V. ID = 15 mA; Tamb =25 °C. handbook, halfpage MCD948 10 f (MHz) 102 103 103 102 10 1 −103 −102 −10 −1 yrs ( µS) ϕrs (deg) ϕrs yrs Fig.18 Reverse transfer admittance and phase as a function of frequency; typical values. VDS = 5 V; VG2 =4V. ID = 15 mA; Tamb =25 °C. handbook, halfpage 102 10 1 −102 −10 −1 MCD949 10 102 103 f (MHz) yfs (mS) ϕfs (deg) ϕfs yfs Fig.19 Forward transfer admittance and phase as a function of frequency; typical values. VDS = 5 V; VG2 =4V. ID = 15 mA; Tamb =25 °C. handbook, halfpage MCD950 10 bos f (MHz) Yos (mS) 102 103 10 1 10−2 10−1 gos Fig.20 Output admittance as a function of frequency; typical values. VDS = 5 V; VG2 =4V. ID = 15 mA; Tamb =25 °C. |
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