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S72MS-P Datasheet(PDF) 6 Page - SPANSION

No. de Pieza. S72MS-P
Descripción  based MCP/PoP Products
Descarga  10 Pages
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Fabricante  SPANSION [SPANSION]
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S72MS-P Datasheet(HTML) 6 Page - SPANSION

 
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S72MS-P based MCP/PoP Products
S72MS-P_00_01 September 14, 2006
Data
Sheet
(Adv an ce
Inf o r m a t io n)
3.2
DRAM Input/Output Descriptions
Note
Some of the signal descriptions specifically apply to DDR DRAM only.
3.2.1
ORNAND Signal Descriptions
D-Amax-D-A0
SDRAM Address inputs
D-DQ15-D-DQ0
SDRAM Data input/output
D-CLK
SDRAM System Clock
D-CE#
SDRAM Chip Select
D-CKE
SDRAM Clock Enable
D-BA1-BA0
SDRAM Bank Select
D-RAS#
SDRAM Row Address Strobe
D-CAS#
SDRAM Column Address Strobe
D-DM1-D-DM0
SDRAM Data Input Mask
D-WE#
SDRAM Write Enable input
D-VSS
SDRAM Ground
D-CLK#
DDR SDRAM Clock - in addition to D-CLK, this signal is available for DDRAMs that need CLK# for normal operations
D-VSSQ
SDRAM Input/Output Buffer ground
D-VCCQ
SDRAM Input/Output Buffer power supply
D-VCC
SDRAM device power supply
D-DQS0 - D-
DQS1
DDR SDRAM Data Strobe pins. DQS provides the read data strobes (as output) and the write data strobes (as input).
Each DQS pin corresponds to eight DQ pins, respectively.
N-PRE
ORNAND Power-On Read Enable. Tie to VSS on customer board if not used
N-ALE
ORNAND Address Latch Enable
N-CLE
ORNAND Command Latch Enable
N-CE#
ORNAND Chip-enablE
N-WP#
ORNAND Write-protect
N-WE#
ORNAND Write-enable
N-RE#
ORNAND Read-enable
N-RY/BY#
ORNAND Ready-Busy
N-I/O0-N-I/O15
ORNAND I/O Signals (I/O0-I/O7 for x8 bus width)
N-VCC
ORNAND Power Supply


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