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PIC16LV5X Datasheet(PDF) 5 Page - Microchip Technology |
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PIC16LV5X Datasheet(HTML) 5 Page - Microchip Technology |
5 / 24 page © 1996 Microchip Technology Inc. Advanced Information DS40121A-page 5 Enhanced PIC16LV5X 3.0 ARCHITECTURAL OVERVIEW This section provides information on the architecture of the Enhanced PIC16LV5X. For information on operation of the peripherals, electrical specifications, etc., please refer to the Enhanced PIC16C5X data sheet. FIGURE 3-1: ENHANCED PIC16LV5X SERIES BLOCK DIAGRAM WDT TIME OUT 8 STACK 1 STACK 2 EPROM 512 X 12 TO 2048 X 12 INSTRUCTION REGISTER INSTRUCTION DECODER WATCHDOG TIMER CONFIGURATION WORD OSCILLATOR/ TIMING & CONTROL GENERAL PURPOSE REGISTER FILE (SRAM) 25 or 73 Bytes WDT/TMR0 PRESCALER OPTION REG. “OPTION” “SLEEP” “CODE PROTECT” “OSC SELECT” DIRECT ADDRESS TMR0 FROM W FROM W “TRIS 5” “TRIS 6” FSR TRISA PORTA TRISB PORTB T0CKI PIN 9-11 9-11 12 12 8 W 4 4 4 DATA BUS 8 8 8 8 ALU STATUS FROM W CLKOUT 8 9 6 5 5-7 OSC1 OSC2 MCLR PC “DISABLE” 2 RA3:RA0 RB7:RB0 DIRECT RAM ADDRESS This document was created with FrameMaker404 |
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