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IDT8535-01 Datasheet(PDF) 2 Page - Integrated Device Technology

No. de Pieza. IDT8535-01
Descripción  LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
Descarga  11 Pages
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Fabricante  IDT [Integrated Device Technology]
Página de inicio  http://www.idt.com
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IDT8535-01 Datasheet(HTML) 2 Page - Integrated Device Technology

 
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COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT8535-01
LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL
PIN CONFIGURATION
NOTE:
1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
VDD
Power Supply Voltage
4.6
V
VI
Input Voltage
–0.5 to VDD+0.5
V
VO
Output Voltage
–0.5 to VDD+0.5
V
θJA
PackageThermalImpedance(0lfpm)
92.6
°C/W
TSTG
Storage Temperature
–65 to +150
°C
CAPACITANCE(TA=+25°C,f=1MHz,VIN=0V)
Parameter
Description
Typ.
Max.
Unit
CIN
InputCapacitance
4
pF
RPULLUP
InputPullupResistor
51
K
RPULLDOWN
InputPulldownResistor
51
K
TSSOP
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VEE
CLK_EN
CLK_SEL
CLK0
NC
CLK1
NC
NC
NC
VDD
Q0
xQ0
VDD
Q1
xQ1
Q2
xQ2
VDD
Q3
xQ3
PIN DESCRIPTION(1)
Symbol
Number
Type
Description
VEE
1
PWR
Negative Supply Pin
CLK_EN
2
Input
Pullup
SynchronizingClockEnable. WhenHIGH,clockoutputsfollowclockinput. When
LOW, Q outputs are forced LOW, xQ outputs are forced HIGH. LVCMOS / LVTTL
interfacelevels.
CLK_SEL
3
Input
Pulldown
Clock Select Input. When HIGH, selects CLK1 input. When LOW, selects CLK0
input. LVCMOS / LVTTL interface levels.
CLK0
4
Input
Pulldown
LVCMOS / LVTTL Clock Input
CLK1
6
Input
Pulldown
LVCMOS / LVTTL Clock Input
N C
5, 7, 8, 9
Unused
NoConnection
VDD
10, 13, 18
Power
Positive Supply Pins
xQ3, Q3
11,12
Output
DifferentialOutputPair. LVPECLinterfacelevels.
xQ2 Q2
14, 15
Output
DifferentialOutputPair. LVPECLinterfacelevels.
xQ1, Q1
16,17
Output
DifferentialOutputPair. LVPECLinterfacelevels.
xQ0, Q0
19,20
Output
DifferentialOutputPair. LVPECLinterfacelevels.
NOTE:
1. Pullup and Pulldown refer to internal input resistors. See Capacitance table for typical values.


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