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MC68HC08AS32A Datasheet(PDF) 71 Page - Motorola, Inc

No. de Pieza. MC68HC08AS32A
Descripción  Microcontrollers
Descarga  296 Pages
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Fabricante  MOTOROLA [Motorola, Inc]
Página de inicio  http://www.freescale.com
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MC68HC08AS32A Datasheet(HTML) 71 Page - Motorola, Inc

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Byte Data Link Controller-Digital (BDLC-D)
BDLC MUX Interface
MC68HC08AS32A — Rev. 1
Data Sheet
MOTOROLA
Byte Data Link Controller-Digital (BDLC-D)
71
SOF — Start-of-Frame Symbol
All messages transmitted onto the J1850 bus must begin with a long-active
200-
µs period SOF symbol. This indicates the start of a new message
transmission. The SOF symbol is not used in the CRC calculation.
Data — In-Message Data Bytes
The data bytes contained in the message include the message priority/type,
message ID byte (typically the physical address of the responder), and any
actual data being transmitted to the receiving node. The message format used
by the BDLC is similar to the 3-byte consolidated header message format
outlined by the SAE J1850 document. See SAE J1850 — Class B Data
Communications Network Interface for more information about 1- and 3-byte
headers.
Messages transmitted by the BDLC onto the J1850 bus must contain at least
one data byte and, therefore, can be as short as one data byte and one CRC
byte. Each data byte in the message is eight bits in length and is transmitted
MSB to LSB.
CRC — Cyclical Redundancy Check Byte
This byte is used by the receiver(s) of each message to determine if any errors
have occurred during the transmission of the message. The BDLC calculates
the CRC byte and appends it onto any messages transmitted onto the J1850
bus. It also performs CRC detection on any messages it receives from the
J1850 bus.
CRC generation uses the divisor polynomial X8 + X4 + X3 + X2 + 1. The
remainder polynomial initially is set to all ones. Each byte in the message after
the start of frame (SOF) symbol is processed serially through the CRC
generation circuitry. The one’s complement of the remainder then becomes the
8-bit CRC byte, which is appended to the message after the data bytes in
MSB-to-LSB order.
When receiving a message, the BDLC uses the same divisor polynomial. All
data bytes, excluding the SOF and end of data symbols (EOD) but including the
CRC byte, are used to check the CRC. If the message is error free, the
remainder polynomial will equal X7 + X6 + X2 = $C4, regardless of the data
contained in the message. If the calculated CRC does not equal $C4, the BDLC
will recognize this as a CRC error and set the CRC error flag in the BSVR.
EOD — End-of-Data Symbol
The EOD symbol is a long 200-
µs passive period on the J1850 bus used to
signify to any recipients of a message that the transmission by the originator has
completed. No flag is set upon reception of the EOD symbol.
IFR — In-Frame Response Bytes
The IFR section of the J1850 message format is optional. Users desiring further
definition of in-frame response should review the SAE J1850 — Class B Data
Communications Network Interface specification.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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