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IBIS4-6600
Datasheet
Cypress Semiconductor Corporation
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San Jose, CA 95134
408-943-2600
Contact: info@Fillfactory.com
Document #: 38-05708 Rev.**(Revision 1.3 )
Page 57 of 63
7 Boundary scan test structures
Table 20 summarizes the pins that can be used to scan through internal nodes. In case
testing is not needed, these pins can be left floating.
Table 21: Boundary scan pins
Boundary scan pins
64
BS_RESET
input
Boundary scan: reset
65
BS_CLOCK
input
Boundary scan: clock
66
BS_DIN
input
Boundary scan: in
67
BS_BUS
output
Boundary scan: bus
The following signals can be connected to the bus (make sure to have only one 1 in
the scan registers at any time) (see Table 220).
Table 22: Internal signals that can be connected to the boundary scan bus.
Internal signals
1
eos_yl_shift
16
sub_y<3>
31
data<3>
2
clk_x_seq
17
sub_y<4>
32
data<2>
3
sync_x_seq
18
sub_y<5>
33
data<1>
4
clk_y_seq
19
address<3>
34
data<0>
5
sync_yl_seq
20
address<2>
35
eos_yr_shift
6
reset_seq
21
address<1>
36
eos_x_shift
7
tri_l_seq
22
address<0>
37
sync_yr_shift
8
select_seq
23
data<11>
38
tri_r_seq
9
sub_x<1>
24
data<10>
39
cal_seq
10
sub_x<2>
25
data<9>
40
slowfast_seq
11
sub_x<3>
26
data<8>
41
black_seq
12
sub_x<4>
27
data<7>
42
precharge_seq
13
sub_x<5>
28
data<6>
43
sample_S_seq
14
sub_y<1>
29
data<5>
44
sample_R_seq
15
sub_y<2>
30
data<4>