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IBIS4-6600 Datasheet(PDF) 19 Page - Cypress Semiconductor

No. de pieza IBIS4-6600
Descripción Electrónicos  High resolution 6.6 M Pixel Rolling shutter CMOS Image sensor
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Fabricante Electrónico  CYPRESS [Cypress Semiconductor]
Página de inicio  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

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IBIS4-6600
Datasheet
Cypress Semiconductor Corporation
3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: info@Fillfactory.com
Document #: 38-05708 Rev.**(Revision 1.3 )
Page 19 of 63
Rcal = 0, Vcal = GND
then Vout = Voutfull/2
A similar relation holds for the output range of DAC_DARK (RCAL_DAC_DARK can be
used to tune the output range of this DAC).
3.6 Sub-sampling modes
To increase the frame rate for lower resolution and/or regions of interest, a number of
sub sampling modes have been implemented. The following modes are foreseen
(Table 9). The bits can be programmed in the IMAGE_CORE register (see 3.9).
Table 9: Overview sub sample modes
Mode
Bits
Read
Step
A
000
2
2
Default mode
B
001
2
4
(Skip 2)
C
010
2
6
(Skip 4)
D
011
2
8
(Skip 6)
E
1xx
2
12
(Skip 10)
To preserve the color information, 2 adjacent pixels are read in any mode, while the
number of pixels that is not read, varies from mode to mode. This will be designed as
a repeated block of 24 pixels wide, which is the lowest common multiple of the
modes described above. Including the dummy pixels and the two additional
rows/columns, the number of starting coordinates for the x and y shift register is thus
99 in the X and 138 in the Y direction. The total number of pixels, excluding dummy
pixels, is a multiple of 24, and two additional pixels to have the same window edges
independently of the sub-sampling mode. In the X direction, two columns are always
addressed at the same moment since the signals from the odd and even columns must
be put simultaneously on the corresponding bus. In the Y direction, the rows are
addressed one by one. This results in slightly different implementations of the sub-
sampling modes for the two directions (Figure 11 and Figure 12).


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