IBIS4-6600
Datasheet
Cypress Semiconductor Corporation
3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: info@Fillfactory.com
Document #: 38-05708 Rev.**(Revision 1.3 )
Page 28 of 63
Advantages
Disadvantages
High dynamic range – as the results
includes signal for short and long
integrations times.
Requires system level digital calculations.
3.9 Sequencer
Figure 3 showed a number of control signals that are needed to operate the sensor in a
particular sub-sampling mode, with a certain integration time, output amplifier gain,
etc. Most of these signals are generated on chip by the sequencer that uses only a few
control signals. These control signals should be generated by the external system:
SYS_CLOCK, which defines the pixel rate (nominal 40 MHz),
Y_START pulse, which indicates the start of a new frame,
Y_CLOCK, which selects a new row and will start the row blanking sequence,
including the synchronization and loading of the X-register.
The relative position of the pulses will be determined by a number of data bits that are
uploaded in internal registers through a Serial to Parallel interface (SPI).
3.9.1 Internal registers
Table 12 shows a list of the internal registers with a short description. In the next
section, the registers are explained in more detail.
Table 12: List of internal registers
Register
Bit
Name
Description
11:0
SEQUENCER register
Selection of mode, granularity of the X
sequencer clock, calibration, …
Default value <11:0>:”000100000000”
0
NDR
Mode of readout:
NDR = 0: normal readout (double sampling)
NDR = 1: non-destructive readout
1:2
NDR_mode
4 different modes of non-destructive readout (no
influence if NDR = 0)
3
RESET_BLACK
0 = normal operation
1 = reset of pixels before readout
4
FAST_RESET
0 = electronic shutter operation
1 = addressing from both sides
5
FRAME_CAL_MODE
0 = fast
1 = slow
6
LINE_CAL_MODE
0 = fast
1 = slow
7
CONT_CHARGE
0 = normal mode
1 = ‘continuous precharge’
8
GRAN_X_SEQ_LSB
0 (0000)
9
GRAN_X_SEQ_MSB
Granularity of the X sequencer clock