IBIS4-6600
Datasheet
Cypress Semiconductor Corporation
3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: info@Fillfactory.com
Document #: 38-05708 Rev.**(Revision 1.3 )
Page 29 of 63
Register
Bit
Name
Description
10
BLACK
0 = normal mode
1 = disconnects column amplifiers from busses,
output of amplifier equals dark reference level
11
RESET_ALL
0 = normal mode
1 = continuous reset of all pixels
1 (0001)
10:0
NROF_PIXELS
Number of pixels to count (X direction).
Max. 2222/2 (2210 real + 12 dummy pixels).
Default value <10:0>:”01000000000”
2 (0010)
11:0
NROF_LINES
Number of lines to count (Y direction).
Max. 3014 (3002 real + 12 dummy pixels).
Default value <11:0>:”101111000110”
3 (0011)
11:0
INT_TIME
Integration time.
Default value <11:0>:”000000000001”
7:0
DELAY
Delay of sequencer pulses
Default value <7:0>:”00000011”
0:3
DELAY_PIX_VALID
Delay of PIX_VALID pulse
4 (0100)
4:7
DELAY_EOL/EOF
Delay of EOL/EOF pulses
5 (0101)
6:0
X_REG
X start position (0 to 98).
Default value <6:0>:”0000000”
6 (0110)
7:0
Y_REG
Y start position (0 to 137).
Default value <7:0>:”00000000”
7:0
IMAGE CORE register
Default value <7:0>:”00000000”
1:0
TEST_mode
LSB: odd, MSB: even
0 = normal operation
4:2
X_SUBSAMPLE
sub-sampling mode in X-direction
7 (0111)
7:5
Y_SUBSAMPLE
sub-sampling mode in X-direction
9:0
AMPLIFIER register
Default value <9:0>:”0000010000”
3:0
GAIN<3:0>
Output amplifier gain setting
4
UNITY
0 = gain setting by GAIN<3:0>
1 = unity gain setting
5
ONE_OUT
0 = two analog outputs
1 = multiplexing to one output (out_1)
6
STANDBY
0 = normal operation
1 = amplifier in standby mode.
8 (1000)
7:9
DELAY_CLK_AMP
Delay of pixel clock to output amplifier.
9 (1001)
7:0
DAC_RAW_REG
Amplifier DAC raw offset.
Default value <7:0>:”10000000”
10 (1010)
7:0
DAC_FINE_REG
Amplifier DAC fine offset.
Default value <7:0>:”10000000”
11 (1011)
7:0
DAC_DARK_REG
DAC dark reference on output bus.
Default value <7:0>:”10000000”
10:0
ADC register
Default value <10:0>:”00000000000”
0
STANDBY_1
0 = normal operation
1 = ADC in standby
1
STANDBY_2
2
ONE
0 = multiplexing of two ADC outputs
1 = disable multiplexing
12 (1100)
3
SWITCH
if ONE = 0: delay of output with one
(EXT_CLK = 0) or half (EXT_CLK = 1) clock
cycle
if ONE = 1: switch between two ADCs