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SN74SSTU32864C Datasheet(PDF) 9 Page - Texas Instruments

No. de Pieza. SN74SSTU32864C
Descripción  25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS
Descarga  18 Pages
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Fabricante  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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SN74SSTU32864C Datasheet(HTML) 9 Page - Texas Instruments

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SN74SSTU32864C
25-BIT CONFIGURABLE REGISTERED BUFFER
WITH SSTL_18 INPUTS AND OUTPUTS
SCES542A – JANUARY 2004 – REVISED FEBRUARY 2005
TERMINAL FUNCTIONS
TERMINAL
ELECTRICAL
DESCRIPTION
NAME
CHARACTERISTICS
GND
Ground
Ground input
VCC
Power-supply voltage
1.8 V nominal
VREF
Input reference voltage
0.9 V nominal
CLK
Positive master clock input
Differential input
CLK
Negative master clock input
Differential input
C0, C1
Configuration control inputs – Register A, Register B, 1:1, 1:2 select
LVCMOS inputs
Asynchronous reset input – resets registers and disables VREF data and clock
RESET
LVCMOS input
differential-input receivers. When RESET is low, all Q outputs are forced low.
Data inputs – clocked in on the crossing of the rising edge of CLK and the falling edge of
D1–D25
SSTL_18 inputs
CLK
CSR, DCS
Chip select inputs – disables register clocking(1) when both inputs are high
SSTL_18 inputs
DODT
The outputs of this register bit will not be suspended by the DCS and CSR control.
SSTL_18 input
DCKE
The outputs of this register bit will not be suspended by the DCS and CSR control.
SSTL_18 input
Q1–Q25(2)
Data outputs that are suspended by the DCS and CSR control
1.8-V CMOS outputs
QCS
Data output that will not be suspended by the DCS and CSR control
1.8-V CMOS output
QODT
Data output that will not be suspended by the DCS and CSR control
1.8-V CMOS output
QCKE
Data output that will not be suspended by the DCS and CSR control
1.8-V CMOS output
NC
No internal connection
DNU
Do not use – inputs are in standby-equivalent mode, and outputs are driven low.
(1)
Data inputs = D2, D3, D5, D6, D8–D25 when C0 = 0 and C1 = 0
Data inputs = D2, D3 D5, D6, D8-D14 when C0 = 0 and C1 = 1
Data inputs = D1–D6, D8–D12, D13 when C0 = 1 and C1 = 1
(2)
Data outputs = Q2, Q3, Q5, Q6, Q8–when C0 = 0 and C1 = 0
Data outputs = Q2, Q3 Q5, Q6, Q8–Q14 when C0 = 0 and C1 = 1
Data outputs = Q1–Q6, Q8–Q10, Q12, Q13 when C0 = 1 and C1 = 1
FUNCTION TABLES
INPUTS
OUTPUT
Qn
RESET
DCS
CSR
CLK
CLK
Dn
H
L
X
L
L
H
L
X
H
H
H
X
L
L
L
H
X
L
H
H
H
H
H
X
Q0
H
X
X
L or H
L or H
X
Q0
L
X or floating
X or floating
X or floating
X or floating
X or floating
L
INPUTS
OUTPUTS
DCKE,
QCKE,
RESET
CLK
CLK
DCS,
QCS,
DODT
QODT
H
H
H
H
L
L
H
L or H
L or H
X
Q0
L
X or floating
X or floating
X or floating
L
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