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SN74SSTU32864C Datasheet(PDF) 10 Page - Texas Instruments

No. de Pieza. SN74SSTU32864C
Descripción  25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS
Descarga  18 Pages
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Fabricante  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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SN74SSTU32864C Datasheet(HTML) 10 Page - Texas Instruments

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Absolute Maximum Ratings
(1)
Recommended Operating Conditions
(1)
SN74SSTU32864C
25-BIT CONFIGURABLE REGISTERED BUFFER
WITH SSTL_18 INPUTS AND OUTPUTS
SCES542A – JANUARY 2004 – REVISED FEBRUARY 2005
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
2.5
V
VI
Input voltage range(2)(3)
–0.5
2.5
V
VO
Output voltage range(2)(3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0 or VI > VCC
±50
mA
IOK
Output clamp current
VO < 0 or VO > VCC
±50
mA
IO
Continuous output current
VO = 0 to VCC
±50
mA
Continuous current through each VCC or GND
±100
mA
θ
JA
Package thermal impedance(4)
36
°C/W
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
This value is limited to 2.5 V maximum.
(4)
The package thermal impendance is calculated in accordance with JESD 51-7.
MIN
NOM
MAX
UNIT
VCC
Supply voltage
1.7
1.9
V
VREF
Reference voltage
0.49
× V
CC
0.5
× V
CC
0.51
× V
CC
V
VI
Input voltage
0
VCC
V
VIH
AC high-level input voltage
Data inputs, CSR
VREF + 250 mV
V
VIL
AC low-level input voltage
Data inputs, CSR
VREF – 250 mV
V
VIH
DC high-level input voltage
Data inputs, CSR
VREF + 125 mV
V
VIL
DC low-level input voltage
Data inputs, CSR
VREF – 125 mV
V
VIH
High-level input voltage
RESET, Cn
0.65
× V
CC
V
VIL
Low-level input voltage
RESET, Cn
0.35
× V
CC
V
VICR
Common-mode input voltage range
CLK, CLK
0.675
1.125
V
VI(PP)
Peak-to-peak input voltage
CLK, CLK
600
mV
IOH
High-level output current
–8
mA
IOL
Low-level output current
8
mA
TA
Operating free-air temperature
0
70
°C
(1)
The RESET and Cn inputs of the device must be held at valid logic voltage levels (not floating) to ensure proper device operation. The
differential inputs must not be floating, unless RESET is low. Refer to the TI application report, Implications of Slow or Floating CMOS
Inputs, literature number SCBA004.
10


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