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ZL50062 Datasheet(PDF) 38 Page - Zarlink Semiconductor Inc

No. de Pieza. ZL50062
Descripción  16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (2, 4, 8, or 16Mbps), and 64 Inputs and 64 Outputs
Descarga  68 Pages
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Fabricante  ZARLINK [Zarlink Semiconductor Inc]
Página de inicio  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

ZL50062 Datasheet(HTML) 38 Page - Zarlink Semiconductor Inc

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ZL50062/4
Data Sheet
38
Zarlink Semiconductor Inc.
4MBP
0
Memory Block Programming
When LOW, the memory block programming mode is disabled.
When HIGH, the connection memory block programming mode is ready to program
the Local Connection Memory (LCM) and the Backplane Connection Memory
(BCM).
3OSB
0
Output Stand By
This bit enables the BSTo0-31 and LSTo0-31 serial outputs.
When LOW, BSTo0-31 and LSTo0-31 are driven HIGH or high impedance,
dependent on the BORS and LORS pin settings respectively.
When HIGH, BSTo0-31 and LSTo0-31 are enabled.
2
Reserved
0
Reserved
Must be set to 0 for normal operation
1:0
MS[1:0]
0
Memory Select Bits
These three bits select the connection or data memory for subsequent microport
memory access operations:
00 selects Local Connection Memory (LCM) for read or write operations.
01 selects Backplane Connection Memory (BCM) for read or write operations.
10 selects Local Data Memory (LDM) for read-only operation.
11 selects Backplane Data Memory (BDM) for read-only operation.
Bit
Name
Reset
Value
Description
Table 13 - Control Register Bits (continued)
Output Control with ODE pin and OSB bit
ODE Pin
OSB bit
BSTo0-31, LSTo0-31
0X
Disabled
10
Disabled
1
1
Enabled


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