Motor de Búsqueda de Datasheet de Componentes Electrónicos
Selected language     Spanish  ▼

Delete All
ON OFF
ALLDATASHEET.ES

X  

Preview PDF Download HTML

ZL50062 Datasheet(PDF) 48 Page - Zarlink Semiconductor Inc

No. de Pieza. ZL50062
Descripción  16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (2, 4, 8, or 16Mbps), and 64 Inputs and 64 Outputs
Descarga  68 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Fabricante  ZARLINK [Zarlink Semiconductor Inc]
Página de inicio  http://www.zarlink.com
Logo 

ZL50062 Datasheet(HTML) 48 Page - Zarlink Semiconductor Inc

Zoom Inzoom in Zoom Outzoom out
 48 / 68 page
background image
ZL50062/4
Data Sheet
48
Zarlink Semiconductor Inc.
12
LV_TM
0
MBIST Test Enable
Set HIGH to enable MBIST mode.
Set LOW for normal operation.
11
BISTSDB
0
Backplane Data Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
10
BISTCDB
0
Backplane Data Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Backplane Data
Memory BIST sequence.
9BISTPDB
0
Backplane Data Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Backplane
Data Memory BIST sequence (indicated by assertion of BISTCDB).
A HIGH indicates Pass, a LOW indicates Fail.
8BISTSDL
0
Local Data Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
7
BISTCDL
0
Local Data Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Local Data
Memory BIST sequence.
6BISTPDL
0
Local Data Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Local Data
Memory BIST sequence (indicated by assertion of BISTCDL).
A HIGH indicates Pass, a LOW indicates Fail.
5BISTSCB
0
Backplane Connection Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
4BISTCCB
0
Backplane Connection Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Backplane
Connection Memory BIST sequence.
3BISTPCB
0
Backplane Connection Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Backplane
Connection Memory BIST sequence (indicated by assertion of BISTCCB).
A HIGH indicates Pass, a LOW indicates Fail.
2BISTSCL
0
Local Connection Memory Start BIST Sequence
Sequence enabled on LOW to HIGH transition.
1
BISTCCL
0
Local Connection Memory BIST Sequence Completed (Read-only)
This bit must be polled - when HIGH, indicates completion of Local Connection
Memory BIST sequence.
0BISTPCL
0
Local Connection Memory Pass/Fail Bit (Read-only)
This bit indicates the Pass/Fail status following completion of the Local
Connection Memory BIST sequence (indicated by assertion of BISTCCL).
A HIGH indicates Pass, a LOW indicates Fail.
Bit
Name
Reset
Value
Description
Table 23 - Memory BIST Register (MBISTR) Bits (continued)


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68 


Datasheet Download




Enlace URL




Privacy Policy
ALLDATASHEET.ES
Does ALLDATASHEET help your business so far?  [ DONATE ]  

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Favorito   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn