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ZL50062 Datasheet(PDF) 55 Page - Zarlink Semiconductor Inc

No. de Pieza. ZL50062
Descripción  16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (2, 4, 8, or 16Mbps), and 64 Inputs and 64 Outputs
Descarga  68 Pages
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Fabricante  ZARLINK [Zarlink Semiconductor Inc]
Página de inicio  http://www.zarlink.com
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ZL50062 Datasheet(HTML) 55 Page - Zarlink Semiconductor Inc

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ZL50062/4
Data Sheet
55
Zarlink Semiconductor Inc.
Figure 19 - Input and Output Clock Timing Diagram for GCI-Bus
tIFPW122
tIFPH122
tIFPS122
CK_int *
tFBFPF8_122
tFPFBF8_122
tFPFB16_61
tOCH8
tOCL8
tOCL16
tOCH16
tOCP8
tOCP16
tfOC8
trOC8
trOC16
tfOC16
tOFBOS
Note *: CK_int is the internal clock signal of 131.072MHz
FP8o
C8o
FP16o
C16o
FP8i
C8i
tICH
tICL
tfIC
trIC
tFBFPF8_244
tFPFBF8_244
tIFPH244
tIFPS244
FP8i
FP8o
(244ns)
(122ns)
(244ns)
(122ns)
tOFPW8_122
tOFPW16_61
tFBFPF16_122
tFPFBF16_122
FP16o
(122ns)
tOFPW8_244
tOFPW16_122
(61ns)
tFBFP16_61
Note **: Although the figures above show the frame boundary as measured from the rising edge of C8i/C8o/C16o, the
frame-controlling edge of C8i/C8o/C16o may be the rising edge, as configured via the C8iPOL and COPOL bits of the
Control Register.
tIFPW244
tICP


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