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ZL50062 Datasheet(PDF) 13 Page - Zarlink Semiconductor Inc

No. de Pieza. ZL50062
Descripción  16K-Channel Digital Switch with High Jitter Tolerance, Single Rate (2, 4, 8, or 16Mbps), and 64 Inputs and 64 Outputs
Descarga  68 Pages
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Fabricante  ZARLINK [Zarlink Semiconductor Inc]
Página de inicio  http://www.zarlink.com
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ZL50062 Datasheet(HTML) 13 Page - Zarlink Semiconductor Inc

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ZL50062/4
Data Sheet
13
Zarlink Semiconductor Inc.
LORS
84
D12
Local Output Reset State (5V Tolerant Input with Internal
Pull-down).
When this input is LOW, the device will initialize with the
LSTo0-31 outputs driven high. Following initialization, the
Local stream outputs are always active.
When this input is HIGH, the device will initialize with the
LSTo0-31 outputs at high impedance. Following initialization,
the Local stream outputs may be set active or high impedance
using the ODE pin or on a per-channel basis with the LE bit in
the Local Connection Memory.
LSTo0-15
130, 129,
128, 127,
126, 125,
121, 118, 119,
116, 117, 114,
115, 113, 108,
107
B13, B14,
B15, B16,
C13, C14,
C15, C16,
D13, D14,
D15, D16,
E13, E14,
E15, E16
Local Serial Output Streams 0 to 15 (5V Tolerant Three-state
Outputs with Slew-Rate Control).
These pins output serial TDM data streams at a data rate of:
16.384Mbps (with 256 channels per stream),
8.192Mbps (with 128 channels per stream),
4.096Mbps (with 64 channels per stream) or
2.048Mbps (with 32 channels per stream).
Refer to the descriptions of the LORS and ODE pins for
control of the output HIGH or high impedance state.
LSTo16-31
106, 105,
104, 103,
102, 101, 98,
97, 96, 95,
94, 93, 92,
91, 86, 85
F13, F14,
F15, F16,
G13, G14,
G15, G16,
H13, H14,
H15, H16,
J13, J14, J15,
J16
Local Serial Output Streams 16 to 31 (5V Tolerant Three-state
Outputs with Slew-Rate Control).
These pins output serial TDM data streams at a data rate of:
16.384Mbps (with 256 channels per stream),
8.192Mbps (with 128 channels per stream),
4.096Mbps (with 64 channels per stream) or
2.048Mbps (with 32 channels per stream).
Refer to the descriptions of the LORS and ODE pins for
control of the output HIGH or high impedance state.
Microprocessor Port Signals
A0 - A14
179, 180,
177, 178,
172, 171,
170, 169,
168, 167,
166, 165,
164, 163, 162
A1, A2, A3,
A4, A5, B5,
B6, B7, B8,
B9, C5, C6,
C7, C8, C9
Address 0 - 14 (5V Tolerant Inputs). These pins form the
15-bit address bus to the internal memories and registers.
A0 = LSB
D0 - D15
31, 30, 29,
28, 27, 26,
25, 24, 19,
18, 17, 15,
16, 13, 14, 11
M9, M8, M7,
M6, N9, N8,
N7, N6, P9,
P8, P7, P6,
R9, R8, R7,
R6
Data Bus 0 - 15 (5V Tolerant Inputs/Outputs with
Slew-Rate Control). These pins form the 16-bit data bus of
the microprocessor port.
D0 = LSB
Pin Description (continued)
Pin Name
ZL50064
Package
Coordinates
(256-pin
LQFP)
ZL50062
Package
Coordinates
(256-ball
PBGA)
Description


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