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MC68HC908GR16A Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

No. de Pieza. MC68HC908GR16A
Descripción  M68HC08 Microcontrollers
Descarga  270 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC68HC908GR16A Datasheet(HTML) 29 Page - Freescale Semiconductor, Inc

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Input/Output (I/O) Section
MC68HC908GR16A Data Sheet, Rev. 1.0
Freescale Semiconductor
29
Addr.
Register Name
Bit 7
654321
Bit 0
$0000
Port A Data Register
(PTA)
See page 118.
Read:
PTA7
PTA6
PTA5
PTA4
PTA3
PTA2
PTA1
PTA0
Write:
Reset:
Unaffected by reset
$0001
Port B Data Register
(PTB)
See page 120.
Read:
PTB7
PTB6
PTB5
PTB4
PTB3
PTB2
PTB1
PTB0
Write:
Reset:
Unaffected by reset
$0002
Port C Data Register
(PTC)
See page 122.
Read:
1
PTC6
PTC5
PTC4
PTC3
PTC2
PTC1
PTC0
Write:
Reset:
Unaffected by reset
$0003
Port D Data Register
(PTD)
See page 124.
Read:
PTD7
PTD6
PTD5
PTD4
PTD3
PTD2
PTD1
PTD0
Write:
Reset:
Unaffected by reset
$0004
Data Direction Register A
(DDRA)
See page 118.
Read:
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
Write:
Reset:
0000000
0
$0005
Data Direction Register B
(DDRB)
See page 121.
Read:
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Write:
Reset:
0000000
0
$0006
Data Direction Register C
(DDRC)
See page 122.
Read:
0
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Write:
Reset:
0000000
0
$0007
Data Direction Register D
(DDRD)
See page 125.
Read:
DDRD7
DDRD6
DDRD5
DDRD4
DDRD3
DDRD2
DDRD1
DDRD0
Write:
Reset:
0000000
0
$0008
Port E Data Register
(PTE)
See page 127.
Read:
0
0
PTE5
PTE4
PTE3
PTE2
PTE1
PTE0
Write:
Reset:
Unaffected by reset
$0009
ESCI Prescaler Register
(SCPSC)
See page 166.
Read:
PDS2
PDS1
PDS0
PSSB4
PSSB3
PSSB2
PSSB1
PSSB0
Write:
Reset:
0000000
0
$000A
ESCI Arbiter Control
Register (SCIACTL)
See page 170.
Read:
AM1
ALOST
AM0
ACLK
AFIN
ARUN
AROVFL
ARD8
Write:
Reset:
0000000
0
$000B
ESCI Arbiter Data
Register (SCIADAT)
See page 171.
Read:
ARD7
ARD6
ARD5
ARD4
ARD3
ARD2
ARD1
ARD0
Write:
Reset:
0000000
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 7)


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