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MC68HC908GR16A Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc

No. de Pieza. MC68HC908GR16A
Descripción  M68HC08 Microcontrollers
Descarga  270 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC68HC908GR16A Datasheet(HTML) 31 Page - Freescale Semiconductor, Inc

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Input/Output (I/O) Section
MC68HC908GR16A Data Sheet, Rev. 1.0
Freescale Semiconductor
31
$0018
ESCI Data Register
(SCDR)
See page 164.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
Unaffected by reset
$0019
ESCI Baud Rate Register
(SCBR)
See page 165.
Read:
LINT
LINR
SCP1
SCP0
R
SCR2
SCR1
SCR0
Write:
Reset:
0000000
0
$001A
Keyboard Status
and Control Register
(INTKBSCR)
See page 103.
Read:
0000
KEYF
0
IMASKK
MODEK
Write:
ACKK
Reset:
0000000
0
$001B
Keyboard Interrupt Enable
Register (INTKBIER)
See page 104.
Read:
KBIE7
KBIE6
KBIE5
KBIE4
KBIE3
KBIE2
KBIE1
KBIE0
Write:
Reset:
0000000
0
$001C
Timebase Module Control
Register (TBCR)
See page 214.
Read:
TBIF
TBR2
TBR1
TBR0
0
TBIE
TBON
R
Write:
TACK
Reset:
0000000
0
$001D
IRQ Status and Control
Register (INTSCR)
See page 98.
Read:
0000
IRQF
0
IMASK
MODE
Write:
ACK
Reset:
0000000
0
$001E
Configuration Register 2
(CONFIG2)(1)
See page 75.
Read:
0000
R
TBMCLK-
SEL
OSCENIN-
STOP
ESCIBD-
SRC
Write:
Reset:
0000000
1
$001F
Configuration Register 1
(CONFIG1)(1)
See page 76.
Read:
COPRS
LVISTOP
LVIRSTD
LVIPWRD
LVI5OR3
(Note 1)
SSREC
STOP
COPD
Write:
Reset:
0000000
0
1
. One-time writable register after each reset, except LVI5OR3 bit. LVI5OR3 bit is only reset via POR (power-on reset).
$0020
Timer 1 Status and Control
Register (T1SC)
See page 225.
Read:
TOF
TOIE
TSTOP
00
PS2
PS1
PS0
Write:
0
TRST
Reset:
0010000
0
$0021
Timer 1 Counter
Register High (T1CNTH)
See page 226.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
0000000
0
$0022
Timer 1 Counter
Register Low (T1CNTL)
See page 226.
Read:
Bit 7
654321
Bit 0
Write:
Reset:
0000000
0
$0023
Timer 1 Counter Modulo
Register High (T1MODH)
See page 227.
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
1111111
1
Addr.
Register Name
Bit 7
654321
Bit 0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 7)


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