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MC68HC908GR16A Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc

No. de Pieza. MC68HC908GR16A
Descripción  M68HC08 Microcontrollers
Descarga  270 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC68HC908GR16A Datasheet(HTML) 51 Page - Freescale Semiconductor, Inc

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I/O Registers
MC68HC908GR16A Data Sheet, Rev. 1.0
Freescale Semiconductor
51
3.7.4 ADC Voltage Reference Low Pin (VREFL)
The ADC analog portion uses VREFL as its lower voltage reference pin. By default, connect the VREFH pin
to the same voltage potential as VSS. External filtering is often necessary to ensure a clean VREFL for good
results. Any noise present on this pin will be reflected and possibly magnified in A/D conversion values.
NOTE
For maximum noise immunity, route VREFL carefully and, if not connected
to VSS, place bypass capacitors as close as possible to the package.
Routing VREFH close and parallel to VREFL may improve common mode
noise rejection.
VSSAD and VREFL are double-bonded on the MC68HC908GR16A.
3.7.5 ADC Voltage In (VADIN)
VADIN is the input voltage signal from one of the eight ADC channels to the ADC module.
3.8 I/O Registers
These I/O registers control and monitor ADC operation:
ADC status and control register (ADSCR)
ADC data register (ADRH and ADRL)
ADC clock register (ADCLK)
3.8.1 ADC Status and Control Register
Function of the ADC status and control register (ADSCR) is described here.
COCO — Conversions Complete Bit
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
NOTE
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Address:
$003C
Bit 7
654321
Bit 0
Read:
COCO
AIEN
ADCO
ADCH4
ADCH3
ADCH2
ADCH1
ADCH0
Write:
R
Reset:
00011111
R= Reserved
Figure 3-4. ADC Status and Control Register (ADSCR)


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