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MC68HC908GR16A Datasheet(PDF) 61 Page - Freescale Semiconductor, Inc

No. de Pieza. MC68HC908GR16A
Descripción  M68HC08 Microcontrollers
Descarga  270 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC68HC908GR16A Datasheet(HTML) 61 Page - Freescale Semiconductor, Inc

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Functional Description
MC68HC908GR16A Data Sheet, Rev. 1.0
Freescale Semiconductor
61
The following conditions apply when in manual mode:
•ACQ is a writable control bit that controls the mode of the filter. Before turning on the PLL in manual
mode, the ACQ bit must be clear.
Before entering tracking mode (ACQ = 1), software must wait a given time, tACQ (See 4.8
Acquisition/Lock Time Specifications.), after turning on the PLL by setting PLLON in the PLL
control register (PCTL).
Software must wait a given time, tAL, after entering tracking mode before selecting the PLL as the
clock source to CGMOUT (BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGM are disabled.
4.3.6 Programming the PLL
Use the following procedure to program the PLL. For reference, the variables used and their meaning are
shown in Table 4-1.
NOTE
The round function in the following equations means that the real number
should be rounded to the nearest integer number.
1.
Choose the desired bus frequency, fBUSDES.
2.
Calculate the desired VCO frequency (four times the desired bus frequency).
fVCLKDES = 4 x fBUSDES
3.
Choose a practical PLL (crystal) reference frequency, fRCLK. Typically, the reference crystal is 1–8
MHz.
Frequency errors to the PLL are corrected at a rate of fRCLK. For stability and lock time reduction,
this rate must be as fast as possible. The VCO frequency must be an integer multiple of this rate.
The relationship between the VCO frequency, fVCLK, and the reference frequency, fRCLK, is:
fVCLK = (N) (fRCLK)
N, the range multiplier, must be an integer.
In cases where desired bus frequency has some tolerance, choose fRCLK to a value determined
either by other module requirements (such as modules which are clocked by CGMXCLK), cost
requirements, or ideally, as high as the specified range allows. See Chapter 20 Electrical
Specifications. After choosing N, the actual bus frequency can be determined using equation in 2
above.
Table 4-1. Variable Definitions
Variable
Definition
fBUSDES
Desired bus clock frequency
fVCLKDES
Desired VCO clock frequency
fRCLK
Chosen reference crystal frequency
fVCLK
Calculated VCO clock frequency
fBUS
Calculated bus clock frequency
fNOM
Nominal VCO center frequency
fVRS
Programmed VCO center frequency


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