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MC68HC908GR16A Datasheet(PDF) 80 Page - Freescale Semiconductor, Inc

No. de Pieza. MC68HC908GR16A
Descripción  M68HC08 Microcontrollers
Descarga  270 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC68HC908GR16A Datasheet(HTML) 80 Page - Freescale Semiconductor, Inc

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Computer Operating Properly (COP) Module
MC68HC908GR16A Data Sheet, Rev. 1.0
80
Freescale Semiconductor
The COP counter is a free-running 6-bit counter preceded by a 12-bit prescaler counter. If not cleared by
software, the COP counter overflows and generates an asynchronous reset after 262,128 or 8176
CGMXCLK cycles, depending on the state of the COP rate select bit, COPRS, in the configuration
register. With a 262,128 CGMXCLK cycle overflow option, a 4.9152-MHz crystal gives a COP timeout
period of 53.3 ms. Writing any value to location $FFFF before an overflow occurs prevents a COP reset
by clearing the COP counter and stages 12–5 of the prescaler.
NOTE
Service the COP immediately after reset and before entering or after exiting
stop mode to guarantee the maximum time before the first COP counter
overflow.
A COP reset pulls the RST pin low for 32 CGMXCLK cycles and sets the COP bit in the reset status
register (RSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ is held at VTST. During the break state,
VTST on the RST pin disables the COP.
NOTE
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from
generating a reset even while the main program is not working properly.
6.3 I/O Signals
The following paragraphs describe the signals shown in Figure 6-1.
6.3.1 CGMXCLK
CGMXCLK is the crystal oscillator output signal. CGMXCLK frequency is equal to the crystal frequency.
6.3.2 STOP Instruction
The STOP instruction clears the COP prescaler.
6.3.3 COPCTL Write
Writing any value to the COP control register (COPCTL) clears the COP counter and clears bits 12–5 of
the prescaler. Reading the COP control register returns the low byte of the reset vector. See 6.4 COP
Control Register.
6.3.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler 4096 CGMXCLK cycles after power-up.
6.3.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.


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