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ADG701LBRJ-REEL7 Datasheet(PDF) 11 Page - Analog Devices |
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ADG701LBRJ-REEL7 Datasheet(HTML) 11 Page - Analog Devices |
11 / 12 page ADG701L/ADG702L Rev. 0 | Page 11 of 12 OUTLINE DIMENSIONS 0.80 0.60 0.40 8° 0° 4 8 1 5 4.90 BSC PIN 1 0.65 BSC 3.00 BSC SEATING PLANE 0.15 0.00 0.38 0.22 1.10 MAX 3.00 BSC COPLANARITY 0.10 0.23 0.08 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 21. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 1 3 4 5 2 6 2.90 BSC 1.60 BSC 2.80 BSC 1.90 BSC 0.95 BSC 0.22 0.08 10° 4° 0° 0.50 0.30 0.15 MAX 1.30 1.15 0.90 SEATING PLANE 1.45 MAX 0.60 0.45 0.30 PIN 1 INDICATOR COMPLIANT TO JEDEC STANDARDS MO-178-AB Figure 22. 6-Lead Small Outline Transistor Package [SOT-23] (RT-6) Dimensions shown in millimeters PIN 1 1.60 BSC 2.80 BSC 1.90 BSC 0.95 BSC 5 12 3 4 0.22 0.08 10° 5° 0° 0.50 0.30 0.15 MAX SEATING PLANE 1.45 MAX 1.30 1.15 0.90 2.90 BSC 0.60 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 23. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters |
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