MC100EP91DWR2G datasheet(2/10 Pages) ONSEMI

No. de pieza	MC100EP91DWR2G

Descripción Electrónicos	2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator

Download	10 Pages

Scroll/Zoom	100%

Fabricante Electrónico	ONSEMI [ON Semiconductor]

Página de inicio	http://www.onsemi.com

Logo

2 / 10 page

MC100EP91

http://onsemi.com

2

D1

D2

Q0

Q1

VEE

D0

Q0

D2

D0

VCC

Figure 1. Logic Diagram

Q2

GND

VBB

Positive Level

Input

NECL Output

R1

R2

Table 1. PIN DESCRIPTION

Name

I/O

Default

State

Description

SOIC

QFN

1, 20

3, 4, 12

VCC

−

Positive Supply Voltage. All VCC Pins must be Externally

Connected to Power Supply to Guarantee Proper Opera-

tion.

10

15, 16

VEE

−

Negative Supply Voltage. All VEE Pins must be Externally

Connected to Power Supply to Guarantee Proper Opera-

tion.

14, 17

19, 20, 23,

24

GND

−

Ground.

4, 7

7, 11

VBB

−

ECL Reference Voltage Output

2, 5, 8

5, 8, 13

D[0:2]

LVPECL, LVDS, LVTTL,

LVCMOS, CML, HSTL Input

Low

Noninverted Differential Inputs [0:2]. Internal 75 kW to VEE.

3, 6, 9

6, 9, 14

D[0:2]

LVPECL, LVDS,

LVTTL,LVCMOS, CML,

HSTL Input

High

Inverted Differential Inputs [0:2]. Internal 75 kW to VEE and

75 kW to VCC. When Inputs are Left Open They Default to

(VCC − VEE) / 2.

19,16,13

2, 18, 22

Q[0:2]

NECL Output

−

Noninverted Differential Outputs [0:2]. Typically Terminated

with 50 W to VTT = VCC − 2 V

18,15,12

1, 21, 17

Q[0:2]

NECL Output

−

Inverted Differential Outputs [0:2]. Typically Terminated with

50 W to VTT = VCC − 2 V

11

10

NC

−

No Connect. The NC Pin is NOT Electrically Connected to

the Die and may Safely be Connected to Any Voltage from

VEE to VCC.

N/A

−

EP

−

Exposed Pad. (Note 1)

1. The thermally conductive exposed pad on the package bottom (see case drawing) must be attached to a heat−sinking conduit.

Número de pieza similar - MC100EP91DWR2G

Fabricante Electrónico	No. de pieza	Datasheet	Descripción Electrónicos
ON Semiconductor	MC100EP91DWR2G	181Kb / 10P	Any Level Positive Input to NECL Output Translator August, 2016 ??Rev. 6

More results

Descripción similar - MC100EP91DWR2G

Fabricante Electrónico	No. de pieza	Datasheet	Descripción Electrónicos
ON Semiconductor	NB100LVEP91	182Kb / 11P	2.5 V/3.3 V Any Level Positive Input to -2.5 V/-3.3 V LVNECL Output Translator August, 2016 ??Rev. 19
	NB100LVEP91	145Kb / 10P	2.5 V/3.3 V Any Level Positive Input to ??.5 V/??.3 V LVNECL Output Translator November, 2006 ??Rev. 13
	MC100EP91	181Kb / 10P	Any Level Positive Input to NECL Output Translator August, 2016 ??Rev. 6
	MC100LVEL91	146Kb / 6P	3.3 V Triple LVPECL Input to -3.3 V to -5.0 V ECL Output Translator July, 2016 ??Rev. 12
	MC100LVEL90	149Kb / 5P	-3.3V / -5V Triple ECL Input to LVPECL Output Translator July, 2016 ??Rev. 12
Texas Instruments	SN74AUP1T32	167Kb / 11P	[Old version datasheet] LOW POWER, 1.8/2.5/3.3-V INPUT,3.3-V CMOS OUTPUT, 2-INPUT POSITIVE-OR GATE
ON Semiconductor	MC100EPT25	166Kb / 8P	-3.3V / -5V Differential ECL to 3.3V LVTTL Translator August, 2016 ??Rev. 17
ON Semiconductor	MC100LVEL91	111Kb / 6P	3.3 V Triple LVPECL Input to ??.3 V to ??.0 V ECL Output Translator November, 2006 ??Rev. 10
Texas Instruments	SN74AUP1T00	164Kb / 11P	[Old version datasheet] LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE 2-INPUT POSITIVE-NAND GATE
Texas Instruments	SN74AUP1T02	164Kb / 11P	[Old version datasheet] LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT,SINGLE 2-INPUT POSITIVE-NOR GATE

More results

MC100EP91DWR2G Datasheet(PDF) 2 Page - ON Semiconductor

MC100EP91DWR2G Datasheet(HTML) 2 Page - ON Semiconductor

Número de pieza similar - MC100EP91DWR2G

Descripción similar - MC100EP91DWR2G

Html Pages

1 2 3 4 5 6 7 8 9 10

Datasheet Descarga

Enlace URL