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NB3N3001 Datasheet(PDF) 5 Page - ON Semiconductor

No. de Pieza. NB3N3001
Descripción  3.3 V 106.25 MHz/ 212.5 MHz PureEdge Clock Generator with LVPECL Differential Output
Descarga  8 Pages
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Fabricante  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
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NB3N3001 Datasheet(HTML) 5 Page - ON Semiconductor

   
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NB3N3001
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PARAMETER MEASUREMENT INFORMATION
SCOPE
Q
2 V
Clock
Outputs
20%
80%
80%
20%
Pulse Width
Phase Noise Mask
Offset Frequency
Phase Noise Plot
LVPECL
Figure 4. Output Load AC Test Circuit
(Split Power Supply)
Figure 5. RMS Phase Jitter
Figure 6. Output Duty Cycle/Pulse Width/Period
Figure 7. Output Rise/Fall Time
50
W
50
W
VCC
VEE
−1.3 V
" 0.165 V
Z = 50
W
Z = 50
W
f1
f2
tPERIOD
odc
+
tPW
tPERIOD
RMS
+ Area Under the Masked Phase Noise Plot
tR
tF
VSWING
Q
Q
Q
Q
Q


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