Motor de Búsqueda de Datasheet de Componentes Electrónicos
Selected language     Spanish  ▼

Delete All
ON OFF
ALLDATASHEET.ES

X  

Preview PDF Download HTML

ADN2813 Datasheet(PDF) 19 Page - Analog Devices

No. de Pieza. ADN2813
Descripción  Continuous Rate 10 Mb/s to 1.25 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp
Descarga  28 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Fabricante  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo 

ADN2813 Datasheet(HTML) 19 Page - Analog Devices

Zoom Inzoom in Zoom Outzoom out
 19 / 28 page
background image
ADN2813
Rev. 0 | Page 19 of 28
100k
Ω
VCC/2
100k
Ω
ADN2813
REFCLKP
10
11
REFCLKN
BUFFER
Figure 21. Differential REFCLK Configuration
100k
Ω
VCC/2
100k
Ω
ADN2813
REFCLKP
OUT
REFCLKN
BUFFER
VCC
CLK
OSC
Figure 22. Single-Ended REFCLK Configuration
100k
Ω
VCC/2
100k
Ω
ADN2813
REFCLKP
10
11
NC
REFCLKN
BUFFER
VCC
Figure 23. No REFCLK Configuration
The two uses of the reference clock are mutually exclusive. The
reference clock can be used either as an acquisition aid for the
ADN2813 to lock onto data or to measure the frequency of the
incoming data to within 0.01%. (There is the capability to
measure the data rate to approximately ±10% without the use of
a reference clock.) The modes are mutually exclusive because, in
the first use, the user knows exactly what the data rate is and
wants to force the part to lock onto only that data rate; in the
second use, the user does not know what the data rate is and
wants to measure it.
Lock-to-reference mode is enabled by writing a 1 to I2C Register
Bit CTRLA[0]. Fine data rate readback mode is enabled by
writing a 1 to I2C Register Bit CTRLA[1]. Writing a 1 to both
of these bits at the same time causes an indeterminate state and
is not supported.
Using the Reference Clock to Lock onto Data
In this mode, the ADN2813 locks onto a frequency derived
from the reference clock according to
Data Rate/2CTRLA[5:2] = REFCLK/2CTRLA[7:6]
The user must know exactly what the data rate is and provide a
reference clock that is a function of this rate. The ADN2813 can
still be used as a continuous rate device in this configuration,
provided that the user has the ability to provide a reference clock
that has a variable frequency (see Application Note AN-632).
The reference clock can be anywhere between 10 MHz and
160 MHz. By default, the ADN2813 expects a reference clock of
between 10 MHz and 20 MHz. If it is between 20 MHz and
40 MHz, 40 MHz and 80 MHz, or 80 MHz and 160 MHz, the
user needs to configure the ADN2813 to use the correct
reference frequency range by setting two bits of the CTRLA
register, CTRLA[7:6].
Table 11. CTRLA Settings
CTRLA[7:6]
Range (MHz)
CTRLA[5:2]
Ratio
00
10 to 20
0000
1
01
20 to 40
0001
2
10
40 to 80
n
2n
11
80 to 160
1000
256
The user can specify a fixed integer multiple of the reference
clock to lock onto using CTRLA[5:2], where CTRLA should be
set to the data rate/DIV_FREF, where DIV_FREF represents the
divided-down reference referred to the 10 MHz to 20 MHz
band. For example, if the reference clock frequency is
38.88 MHz and the input data rate is 622.08 Mb/s, CTRLA[7:6]
is set to [01] to give a divided-down reference clock of
19.44 MHz. CTRLA[5:2] is set to [0101], that is, 5, because
622.08 Mb/s/19.44 MHz = 25
In this mode, if the ADN2813 loses lock for any reason, it relocks
onto the reference clock and continues to output a stable clock.
While the ADN2813 is operating in lock-to-reference mode, if
the user ever changes the reference frequency, the FREF range
(CTRLA[7:6]) or the FREF ratio (CTRLA[5:2]), this must be
followed by writing a 0 to 1 transition into the CTRLA[0] bit to
initiate a new lock-to-reference command.
Using the Reference Clock to Measure Data Frequency
The user can also provide a reference clock to measure the
recovered data frequency. In this case, the user provides a
reference clock, and the ADN2813 compares the frequency of
the incoming data to the incoming reference clock and returns a
ratio of the two frequencies to 0.01% (100 ppm). The accuracy
error of the reference clock is added to the accuracy of the
ADN2813 data rate measurement. For example, if a 100 ppm
accuracy reference clock is used, the total accuracy of the
measurement is within 200 ppm.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28 


Datasheet Download




Enlace URL




Privacy Policy
ALLDATASHEET.ES
Does ALLDATASHEET help your business so far?  [ DONATE ]  

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Favorito   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn