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ADN2865 Datasheet(PDF) 5 Page - Analog Devices

No. de Pieza. ADN2865
Descripción  Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery IC w/Loop Timed SERDES
Descarga  33 Pages
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Fabricante  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADN2865 Datasheet(HTML) 5 Page - Analog Devices

 
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Preliminary Technical Data
ADN2865
Rev. PrA | Page 5 of 33
OUTPUT AND TIMING SPECIFICATIONS
Table 3.
Parameter
Conditions
Min
Typ
Max
Unit
CML OUPUT CHARACTERISTICS
Single-Ended Output Swing
VSE (see Figure 75)
300
350
600
mV
Differential Output Swing
VDIFF (see Figure 75)
600
700
1200
mV
Output High Voltage
VOH
VCC
V
Output Low Voltage
VOL
VCC − 0.6
VCC − 0.35
VCC − 0.3
V
CML Ouput Timing
Rise Time
20% to 80%
TBD
ps
Fall Time
80% to 20%
TBD
ps
LVDS OUPUT CHARACTERISTICS
(RXCLKP/N, RXDATP/N)
Differential Output Swing
VDIFF (see Figure 4)
250
320
400
mV
Output High Voltage
VOH
1475
mV
Output Low Voltage
VOL
925
V
Output Offset Voltage
VOS
1125
1200
1275
V
Output Impedance
Differential
100
Ω
LVDS Ouputs Timing
Rise Time
20% to 80%
115
220
ps
Fall Time
80% to 20%
115
220
ps
Setup Time
TS (see Figure 4), OC-48
2.61
ns
Hold Time
TH (see Figure 4), OC-48
-1.70
ns
I2C INTERFACE DC CHARACTERISTICS
LVCMOS
Input High Voltage
VIH
0.7 VCC
V
Input Low Voltage
VIL
0.3 VCC
V
Input Current
VIN = 0.1 VCC or VIN = 0.9 VCC
−10.0
+10.0
μA
Output Low Voltage
VOL, IOL = 3.0 mA
0.4
V
I2C INTERFACE TIMING
(See Figure )
SCK Clock Frequency
400
kHz
SCK Pulse Width High
tHIGH
600
ns
SCK Pulse Width Low
tLOW
1300
ns
Start Condition Hold Time
tHD;STA
600
ns
Start Condition Setup Time
tSU;STA
600
ns
Data Setup Time
tSU;DAT
100
ns
Data Hold Time
tHD;DAT
300
ns
SCK/SDA Rise/Fall Time
TR/TF
20 + 0.1 Cb1
300
ns
Stop Condition Setup Time
tSU;STO
600
ns
Bus Free Time between a Stop and a Start
tBUF
1300
ns
REFCLK CHARACTERISTICS
Optional lock to REFCLK mode
Input Voltage Range
@ REFCLKP or REFCLKN
VIL
0
V
VIH
VCC
V
Minimum Differential Input Drive
100
mV p-p
Reference Frequency
12.3
200
MHz
Required Accuracy
100
ppm
LVTTL DC INPUT CHARACTERISTICS
Input High Voltage
VIH
2.0
V
Input Low Voltage
VIL
0.8
V
Input High Current
IIH, VIN = 2.4 V
5
μA
1 Cb = total capacitance of one bus line in pF. If mixed with Hs-mode devices, faster fall-times are allowed (see Table 6).


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