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ADN2865 Datasheet(PDF) 28 Page - Analog Devices

No. de pieza ADN2865
Descripción Electrónicos  Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery IC w/Loop Timed SERDES
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ADN2865 Datasheet(HTML) 28 Page - Analog Devices

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ADN2865
Preliminary Technical Data
Rev. PrA | Page 28 of 33
1
2
3
4
V1
V1b
V2
V2b
Vdiff = V2-V2b
Vdiff
VT H = AD N 2817 Quantizer T hreshold
VT H
Vref
PIN
NIN
V1
V1b
V2
V2b
TIA
Limamp
CD R
DATAOU T P
DATAOU T N
CIN
COUT
50
50
VREF
NOT ES:
1. D uring data patterns with high transition density, differential D C voltage at V1 and V2 is zero.
2. When the output of the T I A goes to CI D , V1 and V1b are driven to different D C levels. V2 and V2b discharge to the Vref level which
effectively introduces a differential D C offset across the AC coupling capacitors.
3. When the burst of data starts again, the differential D C offset across the AC coupling capacitors is applied to the input levels causing
a D C shift in the differential input. T his shift is large enough such that one of the states, either H I or L O depending on the levels of
V1 and V1b when the T IA went to CID , is cancelled out. T he quantizer will not recognize this as a valid state.
4. T he D C offset slowly discharges until the differential input voltage exceeds the sensitivity of the AD N 2817. T he quantizer will be able
to recognize both H I and L O states at this point.
ADN2817
VCC
Figure 30. Example of Baseline Wander
DC-COUPLED APPLICATION
The inputs to the ADN2865 can also be dc-coupled. This might
be necessary in burst mode applications, where there are long
periods of CIDs, and baseline wander cannot be tolerated. If the
inputs to the ADN2865 are dc-coupled, care must be taken not
to violate the input range and common-mode level require-
ments of the ADN2865 (see Figure through Figure ). If dc
coupling is required, and the output levels of the TIA do not
adhere to the levels shown in Figure , then level shifting and/or
an attenuator must be between the TIA outputs and the
ADN2865 inputs.
Figure 31. DC-Coupled Application
ADN2865
50
Ω
50
50
VCC
TIA
0.1uF
PIN
NIN
VREF
3k
2.5V


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