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NB6L72M Datasheet(PDF) 3 Page - ON Semiconductor

No. de Pieza. NB6L72M
Descripción  2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with CML Outputs
Descarga  10 Pages
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Fabricante  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
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NB6L72M Datasheet(HTML) 3 Page - ON Semiconductor

 
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NB6L72M
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3
VTD1
D1
D1 SEL1
GND Q0
Q0
VCC
VCC
Q1
Q1
GND
SEL0
D0
D0
VTD0
5
678
16
15
14
13
12
11
10
9
1
2
3
4
NB6L72M
Exposed Pad (EP)
Figure 2. Pin Configuration (Top View)
Table 1. INPUT/OUTPUT SELECT TRUTH TABLE
SEL0*
SEL1*
Q0
Q1
L
L
D0
D0
H
L
D1
D0
L
H
D0
D1
H
H
D1
D1
*Defaults LOW when left open
Table 2. PIN DESCRIPTION
Pin
Name
I/O
Description
1
SEL0
LVTTL,LVCMOS
Input
Select Logic Input control that selects D0 or D1 to output Q0. See Table 1, Select Input
Function Table. Pin defaults LOW when left open
2
D0
LVPECL, CML,
LVDS, LVTTL,
LVCMOS, Input
Noninverted Differential Input. Note 1
3
D0
LVPECL, CML,
LVDS, LVTTL,
LVCMOS, Input
Inverted Differential Input. Note 1
4
VTD0
Internal 50 W Termination Pin. Note 1.
5
VTD1
Internal 50 W termination pin. Note 1.
6
D1
LVPECL, CML,
LVDS, LVTTL,
LVCMOS, Input
Noninverted Differential Input. Note 1.
7
D1
LVPECL, CML,
LVDS, LVTTL,
LVCMOS, Input
Inverted Differential Input. Note 1
8
SEL1
LVTTL,LVCMOS
Input
Select Logic Input control that selects D0 or D1 to output Q1. See Table 1, Select Input
Function Table. Pin defaults LOW when left open
9
GND
Negative Supply Voltage
10
Q1
CML Output
Inverted Differential Output. Typically Terminated with 50 W Resistor to VCC.
11
Q1
CML Output
Noninverted Differential Output. Typically Terminated with 50 W Resistor to VCC.
12
VCC
Positive Supply Voltage
13
VCC
Positive Supply Voltage
14
Q0
CML Output
Inverted Differential Reset Input. Typically Terminated with 50 W Resistor to VCC.
15
Q0
CML Output
Noninverted Differential Reset Input. Typically Terminated with 50 W Resistor to VCC.
16
GND
Negative Supply Voltage
EP
The Exposed Pad (EP) on the QFN−16 package bottom is thermally connected to the die for
improved heat transfer out of package. The exposed pad must be attached to a heat−sinking
conduit. The pad is not electrically connected to the die, but is recommended to be
electrically and thermally connected to GND on the PC board.
1. In the differential configuration when the input termination pin (VTDn, VTDn) are connected to a common termination voltage or left open,
and if no signal is applied on Dn/Dn input, then the device will be susceptible to self−oscillation.
2. All VCC and GND pins must be externally connected to a power supply for proper operation.


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