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NB6L611 Datasheet(PDF) 2 Page - ON Semiconductor

No. de Pieza. NB6L611
Descripción  2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buffer
Descarga  9 Pages
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Fabricante  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
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NB6L611 Datasheet(HTML) 2 Page - ON Semiconductor

   
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NB6L611
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VCC VREFAC VEE VCC
VCC NC VEE VCC
Q0
Q0
Q1
Q1
VTD
D
D
VTD
56
7
8
16
15
14
13
12
11
10
9
1
2
3
4
NB6L611
Exposed Pad (EP)
Figure 2. Pin Configuration (Top View)
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
1
VTD
Internal 50 W Termination Pin for D input.
2
D
ECL, CML,
LVCMOS, LVDS,
LVTTL Input
Noninverted Differential Input. Note1. Internal 50 W Resistor to Termination Pin, VTD.
3
D
ECL, CML,
LVCMOS, LVDS,
LVTTL Input
Inverted Differential Input. Note 1. Internal 50 W Resistor to Termination Pin, VTD.
4
VTD
Internal 50 W Termination Pin for D input.
5
VCC
Positive Supply Voltage
6
VREFAC
Output Reference Voltage for direct or capacitor coupled inputs
7
VEE
Negative Supply Voltage
8
VCC
Positive Supply Voltage
9
Q1
LVPECL Output
Inverted Differential Output. Typically Terminated with 50 W Resistor to VCC − 2.0 V.
10
Q1
LVPECL Output
Noninverted Differential Output. Typically Terminated with 50 W Resistor to VCC − 2.0 V.
11
Q0
LVPECL Output
Inverted Differential Output. Typically Terminated with 50 W Resistor to VCC − 2.0 V.
12
Q0
LVPECL Output
Noninverted Differential Output. Typically Terminated with 50 W Resistor to VCC − 2.0 V.
13
VCC
Positive Supply Voltage
14
VEE
Negative Supply Voltage
15
NC
No Connect
16
VCC
Positive Supply Voltage
EP
The Exposed Pad (EP) on the QFN−16 package bottom is thermally connected to the die for
improved heat transfer out of package. The exposed pad must be attached to a heat−sinking
conduit. The pad is not electrically connected to the die, but is recommended to be electrically
and thermally connected to VEE on the PC board.
1. In the differential configuration when the input termination pins (VTD, VTD) are connected to a common termination voltage or left open, and
if no signal is applied on D/D input, then, the device will be susceptible to self−oscillation.
2. All VCC and VEE pins must be externally connected to a power supply for proper operation.


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