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Z86E72 Datasheet(PDF) 25 Page - Zilog, Inc.

No. de Pieza. Z86E72
Descripción  OTP IR MICROCONTROLLERS
Descarga  74 Pages
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Fabricante  ZILOG [Zilog, Inc.]
Página de inicio  http://www.zilog.com
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Z86E72 Datasheet(HTML) 25 Page - Zilog, Inc.

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Z86E72/E73
OTP IR Microcontrollers
DS96LVO1100
P R E L I M I N A R Y
1-25
1
After the POR time, /RESET is a Schmitt-triggered input.
To avoid asynchronous and noisy reset problems, the
Z86L7X is equipped with a reset filter of four external
clocks (4TpC). If the external reset signal is less than 4TpC
in duration, no reset occurs. On the fifth clock after the re-
set is detected, an internal RST signal is latched and held
for an internal register count of 18 external clocks, or for
the duration of the external reset, whichever is longer.
During the reset cycle, /DS is held active Low while /AS cy-
cles at a rate of TpC/2. Program execution begins at loca-
tion 000CH, 5-10 TpC cycles after the RST is released. For
Power-On Reset, the typical reset output time is 5 ms. The
Z86E7X devices do not have internal pull resistors on
Port 3 inputs.
Figure 18. Port 3 Configuration
Port 3
(I/O or Handshake)
Z86LXX
MCU
Pref1
P31
P32
P33
P34
P35
P36
P37
Note:
P31, 32, 33 have a 200 K
mask option called Mask
option 3 similar to Mask
options 1 and 2.
200 K
Mask
Option
D1
R247 = P3M
P31 (AN1)
P32 (AN2)
P33 (REF2)
From Stop-Mode
Recovery Source
1 = Analog
0 = Digital
IRQ2, P31 Data Latch
IRQ0, P32 Data Latch
IRQ1, P33 Data Latch
DIG.
AN.
-
+
-
+
PREF1
COMP1
COMP2


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