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Z86E72 Datasheet(PDF) 30 Page - Zilog, Inc.

No. de Pieza. Z86E72
Descripción  OTP IR MICROCONTROLLERS
Descarga  74 Pages
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Fabricante  ZILOG [Zilog, Inc.]
Página de inicio  http://www.zilog.com
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Z86E72 Datasheet(HTML) 30 Page - Zilog, Inc.

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Z86E72/E73
OTP IR Microcontrollers
1-30
P R E L I M I N A R Y
DS96LVO1100
FUNCTIONAL DESCRIPTION (Continued)
Register File. The register file (bank 0) consists of four I/O
port registers, 236 general-purpose registers, and 16 con-
trol and status registers (R0-R3, R4-R239, and R240-
R255, respectively), Plus two expanded registers groups
(Banks D and F). Instructions can access registers directly
or indirectly through an 8-bit address field. This allows a
short, 4-bit register address using the Register Pointer
(Figure 23). In the 4-bit mode, the register file is divided
into 16 working register groups, each occupying 16 contin-
uous locations. The Register Pointer addresses the start-
ing location of the active working register group.
Note: Working register group E0-EF of Bank 0 are only
accessed through working registers and indirect address-
ing modes.
Stack. The Z86E7X external data memory or the internal
register file is used for the stack. An 8-bit Stack Pointer
(R255) is used for the internal stack that resides in the gen-
eral-purpose registers (R4-R239). SPH is used as a gen-
eral-purpose register only when using internal stacks.
Note: When SPH is used as a general-purpose register
and Port 0 is in address mode, the contents of SPH will be
loaded into Port 0 whenever the internal stack is accessed.
Figure 23. Register Pointer
D7
D6
D5
D4
D3
D2
D1
D0
Expanded Register File Pointer
Working Register Pointer
R253 RP
Default Setting After Reset = 0000 0000
Figure 24. Register Pointer
The upper nibble of the register file address
provided by the register pointer specifies
the active working-register group
r
7
r
6
r
5
r
4
R253
I/O Ports
Specified Working
Register Group
The lower nibble
of the register
file address
provided by the
instruction points
to the specified
register
r
3
r
2
r
1
r
0
Register Group 0
FF
Register Group 1
2F
1F
0F
00
10
20
F0
R15 to R4
R3 to R0
R15 to R0
R15 to R0


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