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P89LPC9401 Datasheet(PDF) 2 Page - NXP Semiconductors

No. de Pieza. P89LPC9401
Descripción  8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 32 segment x 4 LCD driver
Descarga  59 Pages
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Fabricante  PHILIPS [NXP Semiconductors]
Página de inicio  http://www.nxp.com
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P89LPC9401 Datasheet(HTML) 2 Page - NXP Semiconductors

 
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P89LPC9401_1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 5 September 2005
2 of 59
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment
× 4 LCD driver
s Serial flash In-System Programming (ISP) allows coding while the device is mounted
in the end application.
s In-Application Programming (IAP) of the flash code memory. This allows changing the
code in a running application.
s Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
s Low voltage detect (brownout) allows a graceful system shutdown when power fails.
May optionally be configured as an interrupt.
s Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 9
µA typical (total power-down with voltage comparators disabled).
s Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent spurious
and incomplete resets. A software reset function is also available.
s Configurable on-chip oscillator with frequency range options selected by user
programmed flash configuration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz.
s Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
s Programmable port output configuration options: quasi-bidirectional, open drain,
push-pull, input-only.
s Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
s LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
s Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
s Only power and ground connections are required to operate the P89LPC9401 when
internal reset option is selected.
s Four interrupt priority levels.
s Eight keypad interrupt inputs, plus two additional external interrupt inputs.
s Schmitt trigger port inputs.
s Second data pointer.


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