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PCK9446 Datasheet(PDF) 4 Page - NXP Semiconductors

No. de Pieza. PCK9446
Descripción  2.5 V and 3.3 V LVCMOS clock fan-out buffer
Descarga  17 Pages
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Fabricante  PHILIPS [NXP Semiconductors]
Página de inicio  http://www.nxp.com
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PCK9446 Datasheet(HTML) 4 Page - NXP Semiconductors

 
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PCK9446_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 10 April 2006
4 of 17
Philips Semiconductors
PCK9446
2.5 V and 3.3 V LVCMOS clock fan-out buffer
6.
Functional description
Refer to Figure 1 “Logic diagram of PCK9446”.
6.1 Function table
6.2 Supply configurations
[1]
VCC is the positive power supply of the device core and input circuitry. VCC voltage defines the input
threshold and levels.
[2]
VCC(bankA) is the positive power supply of the bank A outputs (VCCA pins). VCC(bankA) voltage defines
bank A output levels.
[3]
VCC(bankB) is the positive power supply of the bank B outputs (VCCB pins). VCC(bankB) voltage defines
bank B output levels. VCCB is internally connected to VCC.
[4]
VCC(bankC) is the positive power supply of the bank C outputs (VCCC pins). VCC(bankC) voltage defines
bank C output levels.
Table 3.
Function table (controls)
Control
Default
Value
0
1
CLK_SEL
0
CLK0
CLK1
FSELA
0
frequency on bank A outputs = fref frequency on bank A outputs = fref ÷ 2
FSELB
0
frequency on bank B outputs = fref frequency on bank B outputs = fref ÷ 2
FSELC
0
frequency on bank C outputs = fref frequency on bank C outputs = fref ÷ 2
MR/OE
0
outputs enabled
internal reset outputs disabled (3-state)
Table 4.
Supported single and dual supply configurations
Supply voltage
configuration
VCC[1]
VCC(bankA)[2]
VCC(bankB)[3]
VCC(bankC)[4]
GND
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
0 V
mixed voltage supply
3.3 V
3.3 V or 2.5 V
3.3 V
3.3 V or 2.5 V
0 V
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
0 V


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