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AD9660KR Datasheet(PDF) 4 Page - Analog Devices

No. de pieza AD9660KR
Descripción Electrónicos  200 MHz Laser Diode Driver with Light Power Control
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD9660KR Datasheet(HTML) 4 Page - Analog Devices

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REV. 0
–4–
AD9660
PIN DESCRIPTIONS
Pin
Function
OUTPUT
Analog laser diode current output. Connect to anode of laser diode, cathode connected to GROUND externally.
BIAS LEVEL
Analog voltage input, VREF to VREF + 1.6 V. Bias current is set proportional to the BIAS LEVEL during calibra-
tion as follows:
I
MONITOR =
V
BIAS LEVEL − VREF
1.85
× R
GAIN + 50 Ω
()
BIAS CAL
TTL/CMOS compatible, Bias loop T/H control signal. Logic HIGH enables calibration mode, and the bias loop
T/H immediately goes into track mode. Logic LOW disables the bias loop T/H and immediately places it in hold
mode. WRITE PULSE should be held logic LOW while calibrating. Floats logic HIGH.
BIAS HOLD
External hold capacitor for the bias loop T/H. Approximate droop in the bias current while BIAS CAL is logic
LOW is: ±∆IBIAS =
18
×10
–9
t
BIAS HOLD
C
BIAS HOLD
. Bandwidth of the loop is: BW =
1
2
π (550 Ω)C
BIAS HOLD
WRITE PULSE
TTL/CMOS compatible, current control signal. Logic HIGH supplies IMODULATION to the laser diode. Logic
LOW turns IMODULATION off. Floats logic HIGH.
WRITE CAL
TTL/CMOS compatible, write loop T/H control signal. Logic HIGH enables calibration mode; before enabling
calibration the bias loop should be calibrated and OFFSET PULSE driven to an appropriate state. In calibration
mode, 13 ns after the WRITE PULSE goes logic HIGH, the write loop T/H goes into track mode (there is no de-
lay if WRITE PULSE is HIGH before WRITE CAL transitions to a HIGH level). The write loop T/H immedi-
ately goes into hold mode when the WRITE PULSE goes Logic LOW. WRITE CAL LOW disables the write
loop T/H and places it in hold mode. Floats logic HIGH.
WRITE LEVEL
Analog voltage input, VREF to VREF +1.6 V. Write current is set proportional to the input voltage during calibra-
tion as follows: IMONITOR =
V
WRITE LEVEL − V REF
1.85
× (R
GAIN + 50 Ω)
WRITE HOLD
External hold capacitor for the write loop T/H. Approximate droop in IMODULATION current while WRITE CAL is
logic LOW is: ±∆IMODULATED =
18
×10
−9
t
WRITE HOLD
C
WRITE HOLD
. Bandwidth of the loop is:
BW
=
1
2
π (550 Ω) C
BIAS HOLD
SENSE IN
Analog current input, IMONITOR, from PIN photo detector diode. SENSE IN should be connected to the cathode
of the PIN diode, with the PIN anode connected to GROUND or a negative voltage. Voltage at SENSE IN var-
ies slightly with temperature and current, but is typically 4.0 V.
GAIN
External connection for the feedback network of the transimpedance amplifier. External feedback network, RGAIN
and CGAIN, should be connected between GAIN and POWER MONITOR. See text for choosing values.
POWER
Output voltage monitor of the internal feedback loop. Voltage is proportional to feedback current from photo
MONITOR
diode.
OFFSET
Set resistor connection for the offset current source. Resistor between OFFSET CURRENT SET and +VS
CURRENT SET determines offset current level. The input voltage at this node varies slightly with temperature and current, but is
typically 1.4 V. See curves. Can also be driven with a current out DAC.
OFFSET
TTL/CMOS compatible, OFFSET current control signal. Logic HIGH adds IOFFSET to IOUT. Logic LOW
PULSE
turns off IOFFSET. Floats logic HIGH.
DISABLE
TTL/CMOS compatible, current output disable circuit. Logic LOW for normal operation; logic HIGH disables
the current outputs to the laser diode, and drives the voltage on the hold capacitors close to VREF (minimizes the
output current when the device is re-enabled). DISABLE floats logic HIGH.
VREF
Analog Voltage Output, internal bandgap voltage reference, ~1.75 V, provided to user for power level offset.
+VS
Positive Power Supply. Nominally +5 V, pin connections should be tied together externally.
GROUND
Ground Reference. All grounds should be tied together externally.


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