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ICS553MI Datasheet(PDF) 2 Page - Integrated Circuit Systems

No. de Pieza. ICS553MI
Descripción  LOW SKEW 1 TO 4 CLOCK BUFFER
Descarga  6 Pages
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Fabricante  ICST [Integrated Circuit Systems]
Página de inicio  http://www.icst.com
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ICS553MI Datasheet(HTML) 2 Page - Integrated Circuit Systems

   
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LOW SKEW 1 TO 4 CLOCK BUFFER
MDS 553 H
2
Revision 080404
In te gr ated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 tel (4 08) 295-9 800 www.icst.com
ICS553
Pin Assignment
Pin Descriptions
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01
µF should be connected between VDD on pin 1 and GND on pin 4, as close to the device as possible.
A 33
Ω series terminating resistor may be used on each clock output if the trace is longer than 1 inch.
To achieve the low output skew that the ICS553 is capable of, careful attention must be paid to board
layout. Essentially, all 4 outputs must have identical terminations, identical loads and identical trace
geometries. If they do not, the output skew will be degraded. For example, using a 30
Ω series termination
on one output (with 33
Ω on the others) will cause at least 15ps of skew.
1
2
3
VDD
4
Q0
Q1
Q3
GND
Q2
ICL K
8
7
6
5
OE
8 Pi n ( 150 mi l ) SOI C
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
VDD
Power
Connect to +2.5V, +3.3V or +5.0V.
2
Q0
Output
Clock Output 0.
3
Q1
Output
Clock Output 1.
4
GND
Power
Connect to ground.
5
ICLK
Input
Clock Input. 5V tolerant input.
6
Q2
Output
Clock Output 2.
7
Q3
Output
Clock Output 3.
8
OE
Input
Output Enable. Tri-states outputs when low. Connect to VDD for normal operation.


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