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AT91SAM7X256 Datasheet(PDF) 16 Page - ATMEL Corporation

No. de Pieza. AT91SAM7X256
Descripción  AT91 ARM Thumb-based Microcontrollers
Descarga  664 Pages
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Fabricante  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
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AT91SAM7X256 Datasheet(HTML) 16 Page - ATMEL Corporation

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6120D–ATARM–02-Feb-06
AT91SAM7X256/128 Preliminary
9.3
Memory Mapping
9.3.1
Internal RAM
• The AT91SAM7X256 embeds a high-speed 64-Kbyte SRAM bank
• The AT91SAM7X128 embeds a high-speed 32-Kbyte SRAM bank.
After reset and until the Remap Command is performed, the SRAM is only accessible at address
0x0020 0000. After Remap, the SRAM also becomes available at address 0x0.
9.3.2
Internal ROM
The AT91SAM7X256/128 embeds an Internal ROM. At any time, the ROM is mapped at
address 0x30 0000. The ROM contains FFPI and SAM-BA program.
9.3.3
Internal Flash
• The AT91SAM7X256 features one bank of 256 Kbytes of Flash
• The AT91SAM7X128 features one bank of 128 Kbytes of Flash.
At any time, the Flash is mapped to address 0x0010 0000. It is also accessible at address 0x0
after the reset and before the Remap Command.
A general purpose NVM (GPNVM) bit is used to boot either on the ROM (default) or from the
Flash.
This GPNVM bit can be cleared or set respectively through the commands “Clear General-pur-
pose NVM Bit” and “Set General-purpose NVM Bit” of the EFC User Interface.
Setting the GPNVM Bit 2 selects the boot from the Flash. Asserting ERASE clears the GPNVM
Bit 2 and thus selects the boot from the ROM by default.
Figure 9-1.
Internal Memory Mapping with GPNVM Bit 2 = 0 (default)
256M Bytes
ROM Before Remap
SRAM After Remap
Undefined Areas
(Abort)
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
1 M Bytes
1 M Bytes
1 M Bytes
252 M Bytes
Internal FLASH
Internal SRAM
0x0000 0000
0x0010 0000
0x0020 0000
0x0030 0000
Internal ROM
0x003F FFFF
0x0040 0000
1 M Bytes


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