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AT91SAM7X256 Datasheet(PDF) 57 Page - ATMEL Corporation

No. de Pieza. AT91SAM7X256
Descripción  AT91 ARM Thumb-based Microcontrollers
Descarga  664 Pages
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Fabricante  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
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AT91SAM7X256 Datasheet(HTML) 57 Page - ATMEL Corporation

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57
6120D–ATARM–02-Feb-06
AT91SAM7X256/128 Preliminary
2
(ERSTL+1) Slow Clock cycles. This gives the approximate duration of an assertion between 60 µs
and 2 seconds. Note that ERSTL at 0 defines a two-cycle duration for the NRST pulse.
This feature allows the Reset Controller to shape the NRST pin level, and thus to guarantee that
the NRST line is driven low for a time compliant with potential external devices connected on the
system reset.
14.3.2
Brownout Manager
Brownout detection prevents the processor from falling into an unpredictable state if the power
supply drops below a certain level. When VDDCORE drops below the brownout threshold, the
brownout manager requests a brownout reset by asserting the bod_reset signal.
The programmer can disable the brownout reset by setting low the bod_rst_en input signal, i.e.;
by locking the corresponding general-purpose NVM bit in the Flash. When the brownout reset is
disabled, no reset is performed. Instead, the brownout detection is reported in the bit BODSTS
of RSTC_SR. BODSTS is set and clears only when RSTC_SR is read.
The bit BODSTS can trigger an interrupt if the bit BODIEN is set in the RSTC_MR.
At factory, the brownout reset is disabled.
Figure 14-3. Brownout Manager
rstc_irq
brown_out
bod_reset
bod_rst_en
BODIEN
RSTC_MR
BODSTS
RSTC_SR
Other
interrupt
sources


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