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MC9S08AW60 Datasheet(PDF) 14 Page - Freescale Semiconductor, Inc |
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MC9S08AW60 Datasheet(HTML) 14 Page - Freescale Semiconductor, Inc |
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14 / 324 page  MC9S08AW60 Data Sheet, Rev 2 14 Freescale Semiconductor Section Number Title Page 10.4.3 Timer x Counter Modulo Registers (TPMxMODH:TPMxMODL) .............................172 10.4.4 Timer x Channel n Status and Control Register (TPMxCnSC) ....................................173 10.4.5 Timer x Channel Value Registers (TPMxCnVH:TPMxCnVL) ....................................174 10.5 Functional Description ..................................................................................................................175 10.5.1 Counter .........................................................................................................................175 10.5.2 Channel Mode Selection ...............................................................................................176 10.5.3 Center-Aligned PWM Mode ........................................................................................178 10.6 TPM Interrupts ..............................................................................................................................179 10.6.1 Clearing Timer Interrupt Flags .....................................................................................179 10.6.2 Timer Overflow Interrupt Description ..........................................................................179 10.6.3 Channel Event Interrupt Description ............................................................................180 10.6.4 PWM End-of-Duty-Cycle Events .................................................................................180 Chapter 11 Serial Communications Interface (S08SCIV2) 11.1 Introduction ...................................................................................................................................181 11.1.1 Features .........................................................................................................................183 11.1.2 Modes of Operation ......................................................................................................183 11.1.3 Block Diagram ..............................................................................................................183 11.2 Register Definition ........................................................................................................................185 11.2.1 SCI Baud Rate Registers (SCIxBDH, SCIxBHL) ........................................................186 11.2.2 SCI Control Register 1 (SCIxC1) .................................................................................187 11.2.3 SCI Control Register 2 (SCIxC2) .................................................................................188 11.2.4 SCI Status Register 1 (SCIxS1) ....................................................................................189 11.2.5 SCI Status Register 2 (SCIxS2) ....................................................................................191 11.2.6 SCI Control Register 3 (SCIxC3) .................................................................................191 11.2.7 SCI Data Register (SCIxD) ..........................................................................................192 11.3 Functional Description ..................................................................................................................192 11.3.1 Baud Rate Generation ...................................................................................................193 11.3.2 Transmitter Functional Description ..............................................................................193 11.3.3 Receiver Functional Description ..................................................................................194 11.3.4 Interrupts and Status Flags ...........................................................................................196 11.3.5 Additional SCI Functions .............................................................................................197 Chapter 12 Serial Peripheral Interface (S08SPIV3) 12.0.1 Features .........................................................................................................................201 12.0.2 Block Diagrams ............................................................................................................201 12.0.3 SPI Baud Rate Generation ............................................................................................203 12.1 External Signal Description ..........................................................................................................204 12.1.1 SPSCK — SPI Serial Clock .........................................................................................204 12.1.2 MOSI — Master Data Out, Slave Data In ....................................................................204 |
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