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TU24C04 Datasheet(Hoja de datos) 1 Page - List of Unclassifed Manufacturers

No. de Pieza. TU24C04
Descripción  CMOS I2C 2-WIRE BUS 4K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 512 X 8 BIT EEPROM
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Fabricante  ETC2 [List of Unclassifed Manufacturers]
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CMOS I²C 2-WIRE BUS
4K ELECTRICALLY ERASABLE PROGRAMMABLE ROM
512 X 8 BIT EEPROM
Turbo IC, Inc.
24C04
PRODUCT INTRODUCTION
PIN DESCRIPTION
DESCRIPTION:
The Turbo IC 24C04 is a serial 4K EEPROM fabricated with
Turbo’s proprietary, high reliability, high performance CMOS
technology. It’s 4K of memory is organized as 512 x 8 bits.
The memory is configured as 32 pages with each page con-
taining 16 bytes. This device offers significant advantages
in low power applications.
The Turbo IC 24C04 uses the I²C addressing protocol and
2-wire serial interface which includes a bidirectional serial
data bus synchronized by a clock. It offers a flexible byte
write and a faster 16-byte page write.
The Turbo IC 24C04 is assembled in either a 8-pin PDIP or
8-pin SOIC package. Pin #1 is not connected (NC). Pin #2
is the A1 device address input for the 24C04. Pin #3 is the
A2 device address input for the 24C04, such that a total of
four 24C04 devices can be connected on a single bus. Pin
#4 is the ground (Vss). Pin #5 is the serial data (SDA) pin
used for bidirectional transfer of data. Pin #6 is the serial
clock (SCL) input pin. Pin #7 is the write protect (WP) pin
used to protect hardware data. Pin #8 is the power supply
(Vcc) pin.
All data is serially transmitted in bytes (8 bits) on the SDA
bus. To access the Turbo IC 24C04 (slave) for a read or
write operation, the controller (master) issues a start condi-
tion by pulling SDA from high to low while SCL is high. The
master then issues the device address byte which consists
of 1010 (A2) (A1) (B8) (R/W).The most significant bits (1010)
are a device type code signifying an EEPROM device. A1
and A2 are the device address select bits which has to match
the A1 and A2 pin inputs on the 24C04 device. The B[8] bit
is the most significant bit of the memory address. The read/
write bit determines whether to do a read or write operation.
After each byte is transmitted, the receiver has to provide
an acknowledge by pulling the SDA bus low on the ninth
clock cycle. The acknowledge is a handshake signal to the
transmitter indicating a successful data transmission.
FEATURES :
• Power Supply Voltage
Single Vcc for Read and Programming
(Vcc = 2.7 V to 5.5 V)
• Low Power (Isb = 2µa @ 5.5 V)
• I²C Bus, 2-Wire Serial Interface
• Support Byte Write and Page Write (16 Bytes)
• Automatic Page write Operation (maximum 10 ms)
Internal Control Timer
Internal Data Latches for 16 Bytes
• High Reliability CMOS Technology with EEPROM Cell
Endurance : 1,000,000 Cycles
Data Retention : 100 Y
ears
1
SERIAL CLOCK (SCL)
The SCL input synchronizes the data on the SDA
bus. It is used in conjunction with SDA to define
the start and stop conditions. It is also used in
conjunction with SDA to transfer data to and from
the Turbo IC 24C04.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data
in and out of the Turbo IC 24C04. The pin is an
open-drain output. A pullup resistor must be con-
nected from SDA to Vcc.
PIN DESCRIPTION
DEVICE ADDRESS (A1 & A2)
A1 and A2 are device address inputs that en-
ables a total of four 24C04 devices to connect
on a single bus. When the address input pin is
left unconnected, it is interpreted as zero.
WRITE PROTECT (WP)
When the write protect input is connected to Vcc,
the entire memory array is protected against write
operations. For normal write operations, the write
protect pin should be grounded. When the pin is
left unconnected, WP is interpreted as zero.
1
2
3
4
5
6
7
8
NC
A1
A2
GND
VCC
WP
SCL
SDA
8 pin PDIP
1
2
3
4
5
6
7
8
NC
A1
A2
GND
VCC
WP
SCL
SDA
8 pin SOIC




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