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W39V040A Datasheet(PDF) 6 Page - Winbond

No. de Pieza. W39V040A
Descripción  512K × 8 CMOS FLASH MEMORY WITH LPC INTERFACE
Descarga  34 Pages
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Fabricante  WINBOND [Winbond]
Página de inicio  http://www.winbond.com
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W39V040A Datasheet(HTML) 6 Page - Winbond

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W39V040A
- 6 -
GPI Register
BIT
FUNCTION
7
− 5
Reserved
4
Read GPI4 pin status
3
Read GPI3 pin status
2
Read GPI2 pin status
1
Read GPI1 pin status
0
Read GPI0 pin status
Product Identification Registers
There is an alternative software method (six commands bytes) to read out the Product Identification in
both the Programmer interface mode and the LPC interface mode. Thus, the programming equipment
can automatically matches the device with its proper erase and programming algorithms.
In the software access mode, a six-byte (or JEDEC 3-byte) command sequence can be used to access
the product ID for programmer interface mode. A read from address 0000(hex) outputs the
manufacturer code, DA(hex). A read from address 0001(hex) outputs the device code, 3D(hex).” The
product ID operation can be terminated by a three-byte command sequence or an alternate one-byte
command sequence (see Command Definition table for detail).
Identification Input Pins ID[3:0]
These pins are part of mechanism that allows multiple parts to be used on the same bus. The boot
device should be 0000b. And all the subsequent parts should use the up-count strapping. Note that a 1M
byte ROM will occupy two Ids. For example: a 1MByte ROM's ID is 0000b, the next ROM's ID is 0010b.
These pins all are pulled down with internal resistor.
Memory Address Map
There are 8M bytes space reserved for BIOS Addressing. The 8M bytes are mapped into a single 4M
system address by dividing the ROMs into two 4M byte pages. For accessing the 4M byte BIOS storage
space, the ID[2:0] pins are inverted in the ROM and are compared to address lines [21:19]. ID[3] can be
used as like active low chip-select pin.
The 32Mbit address space is as below:
BLOCK
LOCK
ADDRESS RANGE
4M Byte BIOS ROM
None
FFFF, FFFFh: FFC0, 0000h
The ROM responds to 640K (top 512K + bottom 128K) byte pages based on the ID pins strapping
according to the following table:
ID[2:0] PINS
ROM BASED ADDRESS RANGE
000
FFFF, FFFFh: FFF8, 0000h & 000F, FFFFh: 000E, 00000h
001
FFF7, FFFFh: FFF0, 0000h
010
FFEF, FFFFh: FFE8, 0000h
011
FFE7, FFFFh: FFE0, 0000h


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