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CAT140161TWI-GT3 Datasheet(PDF) 10 Page - Catalyst Semiconductor

No. de pieza CAT140161TWI-GT3
Descripción Electrónicos  Voltage Supervisor with I2C Serial CMOS EEPROM
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Fabricante Electrónico  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT140161TWI-GT3 Datasheet(HTML) 10 Page - Catalyst Semiconductor

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CAT140xx
© 2006 Catalyst Semiconductor, Inc.
10
Doc. No. 1117 Rev. A
Characteristics subject to change without notice
READ OPERATIONS
Immediate Read
Upon receiving a Slave address with the R/W bit set
to ‘1’, the CAT140xx will interpret this as a request for
data residing at the current byte address in memory.
The CAT140xx will acknowledge the Slave address,
will immediately shift out the data residing at the
current address, and will then wait for the Master to
respond. If the Master does not acknowledge the data
(NoACK) and then follows up with a STOP condition
(Figure 10), the CAT140xx returns to Standby mode.
Selective Read
Selective Read operations allow the Master device to
select at random any memory location for a read
operation. The Master device first performs a ‘dummy’
write operation by sending the START condition, slave
address and byte address of the location it wishes to
read. After the CAT140xx acknowledges the byte
address, the Master device resends the START
condition and the slave address, this time with the R/W
bit set to one. The CAT140xx then responds with its
acknowledge and sends the requested data byte. The
Master device does not acknowledge the data (NoACK)
but will generate a STOP condition (Figure 11).
Sequential Read
If during a Read session, the Master acknowledges
the 1
st data byte, then the CAT140xx will continue
transmitting data residing at subsequent locations until
the Master responds with a NoACK, followed by a
STOP (Figure 12). In contrast to Page Write, during
Sequential Read the address count will automatically
increment to and then wrap-around at end of memory
(rather than end of page).
POWER-ON RESET (POR)
Each CAT140xx incorporates Power-On Reset (POR)
circuitry which protects the internal logic against
powering up in the wrong state.
A CAT140xx device will power up into Standby mode
after VCC exceeds the POR trigger level and will power
down into Reset mode when VCC drops below the
POR trigger level. This bi-directional POR feature
protects the device against ‘brown-out’ failure follo–
wing a temporary loss of power.
Delivery State
The CAT140xx is shipped erased, i.e., all bytes are FFh.


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