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MC908QC4CDXER Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc |
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MC908QC4CDXER Datasheet(HTML) 30 Page - Freescale Semiconductor, Inc |
30 / 274 page Memory MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 2 30 Freescale Semiconductor $0024 TIM1 Counter Modulo Register Low (T1MODL) See page 200. Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Write: Reset: 11 1111 11 $0025 TIM1 Channel 0 Status and Control Register (T1SC0) See page 201. Read: CH0F CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX Write: 0 Reset: 00 0000 00 $0026 TIM1 Channel 0 Register High (T1CH0H) See page 204. Read: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Write: Reset: Indeterminate after reset $0027 TIM1 Channel 0 Register Low (T1CH0L) See page 204. Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Write: Reset: Indeterminate after reset $0028 TIM1 Channel 1 Status and Control Register (T1SC1) See page 198. Read: CH1F CH1IE 0 MS1A ELS1B ELS1A TOV1 CH1MAX Write: 0 Reset: 00 0000 00 $0029 TIM1 Channel 1 Register High (T1CH1H) See page 204. Read: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Write: Reset: Indeterminate after reset $002A TIM1 Channel 1 Register Low (T1CH1L) See page 204. Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Write: Reset: Indeterminate after reset $002B ↓ $002F Reserved $0030 TIM1 Channel 2 Status and Control Register (T1SC2) See page 201. Read: CH2F CH2IE 0 MS2A ELS2B ELS2A TOV2 CH2MAX Write: 0 Reset: 00 0000 00 $0031 TIM1 Channel 2 Register High (T1CH2H) See page 204. Read: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Write: Reset: Indeterminate after reset $0032 TIM1 Channel 2 Register Low (T1CH2L) See page 204. Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Write: Reset: Indeterminate after reset $0033 TIM1 Channel 3 Status and Control Register (T1SC3) See page 201. Read: CH3F CH3IE 0 MS3A ELS3B ELS3A TOV3 CH3MAX Write: 0 Reset: 00 0000 00 Addr. Register Name Bit 7 6 5432 1 Bit 0 = Unimplemented R = Reserved U = Unaffected Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 8) |
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