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ST72334J Datasheet(PDF) 6 Page - STMicroelectronics

No. de Pieza. ST72334J
Descripción  8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
Descarga  153 Pages
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Fabricante  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
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ST72334J Datasheet(HTML) 6 Page - STMicroelectronics

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ST72334J/N, ST72314J/N, ST72124J
6/153
2 INTRODUCTION
The ST72334J/N, ST72314J/N and ST72124J de-
vices are members of the ST7 microcontroller fam-
ily. They can be grouped as follows:
– ST72334J/N devices are designed for mid-range
applications with Data EEPROM, ADC, SPI and
SCI interface capabilities.
– ST72314J/N devices target the same range of
applications but without Data EEPROM.
– ST72124J devices are for applications that do
not need Data EEPROM and the ADC peripher-
al.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set.
The
ST72C334J/N,
ST72C314J/N
and
ST72C124J
versions
feature
single-voltage
FLASH memory with byte-by-byte In-Situ Pro-
gramming (ISP) capability.
Under software control, all devices can be placed
in WAIT, SLOW, ACTIVE-HALT or HALT mode,
reducing power consumption when the application
is in idle or standby state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication
and indirect addressing
modes.
For easy reference, all parametric data are located
in Section 16 on page 107.
Figure 1. General Block Diagram
8-BIT CORE
ALU
OSC1
ISPSEL
CONTROL
PROGRAM
(8K or 16K Bytes)
VSS
RESET
PORT F
PF7,6,4,2:0
(6-BIT)
TIMER A
BEEP
PORT A
RAM
(384 or 512 Bytes)
PORT C
8-BIT ADC
VDDA
VSSA
PORT B
PB7:0
PORT E
PE7:0
SCI
TIMER B
PA7:0
PORT D
PD7:0
SPI
PC7:0
(8-BIT)
VDD
EEPROM
(256 Bytes)
WATCHDOG
MULTI OSC
LVD
OSC2
MEMORY
MCC/RTC
+
CLOCK FILTER
(8-BIT for N versions)
(5-BIT for J versions)
(8-BIT for N versions)
(5-BIT for J versions)
(6-BIT for N versions)
(2-BIT for J versions)
(8-BIT for N versions)
(6-BIT for J versions)


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